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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-04-16 10:27:31 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-04-16 10:27:31 +0200 |
| commit | 807522fc9ae49e022c9f3556506b4f4c961b17aa (patch) | |
| tree | 2f490b01ed00c70cb2eec4a89667cbb9da1ef5a2 /board | |
| parent | b81a4630a3914d611ca3e72b451c4509c60ae9b1 (diff) | |
| parent | ad88297e2f14220f34417d1304d256285887aed4 (diff) | |
| download | barebox-807522fc9ae49e022c9f3556506b4f4c961b17aa.tar.gz barebox-807522fc9ae49e022c9f3556506b4f4c961b17aa.tar.xz | |
Merge with /home/hs/U-Boot/u-boot-dev
Diffstat (limited to 'board')
| -rw-r--r-- | board/dbau1x00/lowlevel_init.S | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S index 7afd5840c8..14a78465f3 100644 --- a/board/dbau1x00/lowlevel_init.S +++ b/board/dbau1x00/lowlevel_init.S @@ -185,6 +185,8 @@ tlbloop: bne t0, t2, tlbloop nop +#endif /* CONFIG_DBAU1550 */ + /* First setup pll:s to make serial work ok */ /* We have a 12 MHz crystal */ li t0, SYS_CPUPLL @@ -205,6 +207,7 @@ tlbloop: sw t1, 0(t0) /* aux pll */ sync +#ifdef CONFIG_DBAU1550 /* Static memory controller */ /* RCE0 - can not change while fetching, do so from icache */ move t2, ra /* Store return address */ @@ -237,7 +240,7 @@ noCacheJump: sw t1, 0(t0) #else /* CONFIG_DBAU1550 */ li t0, MEM_STTIME0 - li t1, 0x00014C0F + li t1, 0x040181D7 sw t1, 0(t0) /* RCE0 AMD 29LV640M MirrorBit Flash */ |