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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-04-20 09:17:33 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-04-21 08:06:32 +0200 |
commit | c0befa7cd0a16c6f3512124dac377fc9e1f46e34 (patch) | |
tree | f875b53a1123efd75ddd1a55372191ff45866471 /common/state/backend_format_dtb.c | |
parent | d11584df3d8c311f8d12a16badc8fbe18e592f87 (diff) | |
download | barebox-c0befa7cd0a16c6f3512124dac377fc9e1f46e34.tar.gz barebox-c0befa7cd0a16c6f3512124dac377fc9e1f46e34.tar.xz |
ARM: cache-l2x0: honour aux_val when determing way size
l2x0_init() allows to overwrite bits in the AUX_CTRL register
using the aux_val/aux_mask arguments. On i.MX35 this is used
to pass a correct AUX_CTRL value to overwrite bogus reset values
for this register. To make this work we have to apply
aux_val/aux_mask before using the AUX_CTRL value to determine the
way size.
This fixes: 3f7e890da7 ARM: l2x0: Implement L310 support
Before this commit the way size was hardcoded to 8.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'common/state/backend_format_dtb.c')
0 files changed, 0 insertions, 0 deletions