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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2007-07-05 18:02:01 +0200 |
|---|---|---|
| committer | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-07-05 18:02:01 +0200 |
| commit | 36a60cf92b09d94ac0a38d1e441dca791624e9e2 (patch) | |
| tree | e01bdf6d7084c5e95f900bc4fc16da5dd5275801 /cpu/ppc4xx | |
| parent | f1b8cfbd1d0c0a5254435f882cd4eaa5eac23ead (diff) | |
| download | barebox-36a60cf92b09d94ac0a38d1e441dca791624e9e2.tar.gz barebox-36a60cf92b09d94ac0a38d1e441dca791624e9e2.tar.xz | |
svn_rev_526
CFG_CACHELINESIZE -> CONFIG_CACHELINE_SIZE
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/kgdb.S | 6 | ||||
| -rw-r--r-- | cpu/ppc4xx/start.S | 16 |
2 files changed, 11 insertions, 11 deletions
diff --git a/cpu/ppc4xx/kgdb.S b/cpu/ppc4xx/kgdb.S index be283403e9..b5962d2ea6 100644 --- a/cpu/ppc4xx/kgdb.S +++ b/cpu/ppc4xx/kgdb.S @@ -56,7 +56,7 @@ kgdb_flush_cache_all: .globl kgdb_flush_cache_range kgdb_flush_cache_range: - li r5,CFG_CACHELINE_SIZE-1 + li r5,CONFIG_CACHELINE_SIZE-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 @@ -65,12 +65,12 @@ kgdb_flush_cache_range: mtctr r4 mr r6,r3 1: dcbst 0,r3 - addi r3,r3,CFG_CACHELINE_SIZE + addi r3,r3,CONFIG_CACHELINE_SIZE bdnz 1b sync /* wait for dcbst's to get to ram */ mtctr r4 2: icbi 0,r6 - addi r6,r6,CFG_CACHELINE_SIZE + addi r6,r6,CONFIG_CACHELINE_SIZE bdnz 2b SYNC blr diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 25acd006ca..e93a8138f6 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1093,13 +1093,13 @@ invalidate_icache: invalidate_dcache: addi r6,0,0x0000 /* clear GPR 6 */ /* Do loop for # of dcache congruence classes. */ - lis r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha /* TBS for large sized cache */ - ori r7, r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l + lis r7, (CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@ha /* TBS for large sized cache */ + ori r7, r7, (CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@l /* NOTE: dccci invalidates both */ mtctr r7 /* ways in the D cache */ ..dcloop: dccci 0,r6 /* invalidate line */ - addi r6,r6, CFG_CACHELINE_SIZE /* bump to next line */ + addi r6,r6, CONFIG_CACHELINE_SIZE /* bump to next line */ bdnz ..dcloop blr @@ -1115,8 +1115,8 @@ flush_dcache: mtdccr r10 /* do loop for # of congruence classes. */ - lis r10,(CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha /* TBS: for large cache sizes */ - ori r10,r10,(CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l + lis r10,(CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@ha /* TBS: for large cache sizes */ + ori r10,r10,(CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@l lis r11,(CFG_DCACHE_SIZE / 2)@ha /* D cache set size - 2 way sets */ ori r11,r11,(CFG_DCACHE_SIZE / 2)@l /* D cache set size - 2 way sets */ mtctr r10 @@ -1126,8 +1126,8 @@ flush_dcache: lwz r3,0(r10) /* least recently used side */ lwz r3,0(r11) /* the other side */ dccci r0,r11 /* invalidate both sides */ - addi r10,r10,CFG_CACHELINE_SIZE /* bump to next line */ - addi r11,r11,CFG_CACHELINE_SIZE /* bump to next line */ + addi r10,r10,CONFIG_CACHELINE_SIZE /* bump to next line */ + addi r11,r11,CONFIG_CACHELINE_SIZE /* bump to next line */ bdnz ..flush_dcache_loop sync /* allow memory access to complete */ mtdccr r9 /* restore dccr */ @@ -1365,7 +1365,7 @@ relocate_code: ori r4, r4, CFG_MONITOR_BASE@l lwz r5, GOT(__init_end) sub r5, r5, r4 - li r6, CFG_CACHELINE_SIZE /* Cache Line Size */ + li r6, CONFIG_CACHELINE_SIZE /* Cache Line Size */ /* * Fix GOT pointer: |