ata: ahci: replace magic numbers with named constants

Signed-off-by: Denis Orlov <denorl2009@gmail.com>
Link: https://lore.barebox.org/20220504092553.27961-2-denorl2009@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2 files changed, 23 insertions, 10 deletions

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index ad9e2f950f..c64c856f94 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -101,7 +101,7 @@ static inline void __iomem *ahci_port_base(void __iomem *base, int port)
 
 static int ahci_link_ok(struct ahci_port *ahci_port, int verbose)
 {
-	u32 val = ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf;
+	u32 val = ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET;
 
 	if (val == 0x3)
 		return true;
@@ -166,7 +166,7 @@ static int ahci_io(struct ahci_port *ahci_port, u8 *fis, int fis_len, void *rbuf
 	sg_count = ahci_fill_sg(ahci_port, rbuf ? rbuf : wbuf, buf_len);
 	opts = (fis_len >> 2) | (sg_count << 16);
 	if (wbuf)
-		opts |= 1 << 6;
+		opts |= CMD_LIST_OPTS_WRITE;
 	ahci_fill_cmd_slot(ahci_port, opts);
 
 	ahci_port_write_f(ahci_port, PORT_CMD_ISSUE, 1);
@@ -355,7 +355,7 @@ static int ahci_init_port(struct ahci_port *ahci_port)
 	 * rarely has it taken between 1-2 ms. Never seen it above 2 ms.
 	 */
 	ret = wait_on_timeout(WAIT_LINKUP,
-			(ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf) == 0x3);
+			(ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET) == 0x3);
 	if (ret) {
 		ahci_port_info(ahci_port, "SATA link timeout\n");
 		ret = -ETIMEDOUT;
@@ -373,15 +373,16 @@ static int ahci_init_port(struct ahci_port *ahci_port)
 
 	ret = wait_on_timeout(WAIT_SPINUP,
 			((ahci_port_read(ahci_port, PORT_TFDATA) &
-			 (ATA_STATUS_BUSY | ATA_STATUS_DRQ)) == 0)
-			|| ((ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf) == 1));
+			 (ATA_STATUS_BUSY | ATA_STATUS_DRQ)) == 0) ||
+			((ahci_port_read(ahci_port, PORT_SCR_STAT) &
+			 PORT_SCR_STAT_DET) == 1));
 	if (ret) {
 		ahci_port_info(ahci_port, "timeout.\n");
 		ret = -ENODEV;
 		goto err_init;
 	}
 
-	if ((ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf) == 1) {
+	if ((ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET) == 1) {
 		ahci_port_info(ahci_port, "down.\n");
 		ret = -ENODEV;
 		goto err_init;
@@ -408,7 +409,7 @@ static int ahci_init_port(struct ahci_port *ahci_port)
 
 	ahci_port_debug(ahci_port, "status: 0x%08x\n", val);
 
-	if ((val & 0xf) == 0x03)
+	if ((val & PORT_SCR_STAT_DET) == 0x3)
 		return 0;
 
 	ret = -ENODEV;
@@ -581,8 +582,8 @@ int ahci_add_host(struct ahci_device *ahci)
 	ahci_debug(ahci, "ahci_host_init: start\n");
 
 	cap_save = ahci_ioread(ahci, HOST_CAP);
-	cap_save &= ((1 << 28) | (1 << 17));
-	cap_save |= (1 << 27);  /* Staggered Spin-up. Not needed. */
+	cap_save &= (HOST_SMPS | HOST_SPM);
+	cap_save |= HOST_SSS;  /* Staggered Spin-up. Not needed. */
 
 	/* global controller reset */
 	tmp = ahci_ioread(ahci, HOST_CTL);
@@ -605,7 +606,7 @@ int ahci_add_host(struct ahci_device *ahci)
 
 	ahci->cap = ahci_ioread(ahci, HOST_CAP);
 	ahci->port_map = ahci_ioread(ahci, HOST_PORTS_IMPL);
-	ahci->n_ports = (ahci->cap & 0x1f) + 1;
+	ahci->n_ports = (ahci->cap & HOST_NP) + 1;
 
 	ahci_debug(ahci, "cap 0x%x  port_map 0x%x  n_ports %d\n",
 	      ahci->cap, ahci->port_map, ahci->n_ports);
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 7fed43045a..5a187fd2e1 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -33,6 +33,12 @@
 #define HOST_VERSION		0x10 /* AHCI spec. version compliancy */
 #define HOST_CAP2		0x24 /* host capabilities, extended */
 
+/* HOST_CAP bits */
+#define HOST_SMPS		(1 << 28)   /* supports mechanical presence switch */
+#define HOST_SSS		(1 << 27)   /* supports staggered spin-up */
+#define HOST_SPM		(1 << 17)   /* supports port multiplier */
+#define HOST_NP			(0x1f << 0) /* number of ports */
+
 /* HOST_CTL bits */
 #define HOST_RESET		(1 << 0)  /* reset controller; self-clear */
 #define HOST_IRQ_EN		(1 << 1)  /* global IRQ enable */
@@ -98,6 +104,9 @@
 #define PORT_CMD_ICC_PARTIAL	(0x2 << 28) /* Put i/f in partial state */
 #define PORT_CMD_ICC_SLUMBER	(0x6 << 28) /* Put i/f in slumber state */
 
+/* PORT_SCR_STAT bits */
+#define PORT_SCR_STAT_DET	(0xf << 0) /* device detection */
+
 #define AHCI_MAX_PORTS		32
 
 /* SETFEATURES stuff */
@@ -130,6 +139,9 @@
 #define ATA_FLAG_PIO_DMA	(1 << 8) /* PIO cmds via DMA */
 #define ATA_FLAG_NO_ATAPI	(1 << 11) /* No ATAPI support */
 
+/* Command list entry DW0 bits */
+#define CMD_LIST_OPTS_WRITE	(1 << 6) /* the direction is a device write */
+
 struct ahci_device;
 
 struct ahci_port {