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author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-04-20 22:11:17 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-04-27 08:09:34 +0200 |
commit | 40827c029fcef4d5cde163f9242b0c05f804d4a8 (patch) | |
tree | 45393ee05fa80f819d03e726864d603219bbab58 /drivers/bus | |
parent | 301765846ba29fb803c0a4e69c75925b031cdeaf (diff) | |
download | barebox-40827c029fcef4d5cde163f9242b0c05f804d4a8.tar.gz barebox-40827c029fcef4d5cde163f9242b0c05f804d4a8.tar.xz |
bus: mvebu-mbus: Remove coherency attribute
Marvell Armada 370 and XP have some coherency fabric. We are not
interested in using it, so remove checking for it in mbus driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/bus')
-rw-r--r-- | drivers/bus/mvebu-mbus.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c index 9dc43011b9..75c357a869 100644 --- a/drivers/bus/mvebu-mbus.c +++ b/drivers/bus/mvebu-mbus.c @@ -109,7 +109,6 @@ struct mvebu_mbus_state { struct resource pcie_mem_aperture; struct resource pcie_io_aperture; const struct mvebu_mbus_soc_data *soc; - int hw_io_coherency; }; static struct mvebu_mbus_state mbus_state; @@ -361,8 +360,6 @@ static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus) w = &mbus_dram_info.cs[cs++]; w->cs_index = i; w->mbus_attr = 0xf & ~(1 << i); - if (mbus->hw_io_coherency) - w->mbus_attr |= ATTR_HW_COHERENCY; w->base = base & DDR_BASE_CS_LOW_MASK; w->size = (size | ~DDR_SIZE_MASK) + 1; } @@ -719,9 +716,6 @@ static int mvebu_mbus_probe(struct device_d *dev) mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture, &mbus_state.pcie_io_aperture); - if (of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric")) - mbus_state.hw_io_coherency = 1; - for (win = 0; win < mbus_state.soc->num_wins; win++) mvebu_mbus_disable_window(&mbus_state, win); |