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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2019-07-17 19:06:00 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-05 12:19:22 +0200 |
| commit | 40a77f50f96078f31340a981c3bb259da2bc59e4 (patch) | |
| tree | 59d24da559103271ec0862bcbb5de753946f6e81 /drivers/clk/imx/clk-imx6.c | |
| parent | 37bc313add4095f9285e4af6fd91fda2d94ed8d8 (diff) | |
| download | barebox-40a77f50f96078f31340a981c3bb259da2bc59e4.tar.gz barebox-40a77f50f96078f31340a981c3bb259da2bc59e4.tar.xz | |
clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
MMDC CH1 is not used on i.MX6Q, so the handshake needed to change the
parent of periph2_sel or the divider of mmdc_ch1_axi_podf will never
succeed.
Disable the handshake mechanism to allow changing the frequency of
mmdc_ch1_axi, allowing to use it as a possible source for the LDB DI
clock.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
[afa: reviewed for barebox]
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
[afa: ported to barebox from Linux commit f13abeff2c]
[afa: moved call site to where it would've been moved in following commit]
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk/imx/clk-imx6.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx6.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index 0b71a13224..d23b7e277b 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -293,6 +293,19 @@ static struct clk_div_table video_div_table[] = { { /* sentinel */ } }; +#define CCM_CCDR 0x04 + +#define CCDR_MMDC_CH1_MASK BIT(16) + +static void __init imx6q_mmdc_ch1_mask_handshake(void __iomem *ccm_base) +{ + unsigned int reg; + + reg = readl(ccm_base + CCM_CCDR); + reg |= CCDR_MMDC_CH1_MASK; + writel(reg, ccm_base + CCM_CCDR); +} + static void imx6_add_video_clks(void __iomem *anab, void __iomem *cb) { clks[IMX6QDL_CLK_PLL5_POST_DIV] = imx_clk_divider_table("pll5_post_div", "pll5_video", anab + 0xa0, 19, 2, post_div_table); @@ -300,6 +313,9 @@ static void imx6_add_video_clks(void __iomem *anab, void __iomem *cb) clks[IMX6QDL_CLK_IPU1_SEL] = imx_clk_mux("ipu1_sel", cb + 0x3c, 9, 2, ipu_sels, ARRAY_SIZE(ipu_sels)); clks[IMX6QDL_CLK_IPU2_SEL] = imx_clk_mux("ipu2_sel", cb + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels)); + + imx6q_mmdc_ch1_mask_handshake(cb); + clks[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_p("ldb_di0_sel", cb + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels)); clks[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_mux_p("ldb_di1_sel", cb + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels)); clks[IMX6QDL_CLK_IPU1_DI0_PRE_SEL] = imx_clk_mux_p("ipu1_di0_pre_sel", cb + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); |