path: root/drivers/clk/socfpga/clk.h
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authorSteffen Trumtrar <>2017-04-28 16:41:41 +0200
committerSascha Hauer <>2017-05-03 13:51:22 +0200
commitd5c8bc3ff1a795cb9ef44abd518f5dae6f9000fa (patch)
treea3dbd48b1feef91687bd75e9227870debbbbf9cb /drivers/clk/socfpga/clk.h
parentdb3feb61d19060a0589f3906a8a081bebd934ace (diff)
ARM: socfpga: add arria10 support
Arria10 is a SoC + FPGA like the Cyclone5 SoCFPGA that is already supported in barebox. Both a the same in some parts, but totaly different in others. Most of the hardware blocks are the same in the SoC parts. The OCRAM is larger on the Arria10 and the SDRAM controller is different. The serial core only supports 32bit accesses (different to the 8bit accesses on the Cyclone5). As Arria10 has 256KB of OCRAM, it is possible to fit a larger barebox (and/or use PBL) instead of the two stage bootprocess used on the Cyclone5 and its 64KB OCRAM. Signed-off-by: Steffen Trumtrar <> Signed-off-by: Sascha Hauer <>
Diffstat (limited to 'drivers/clk/socfpga/clk.h')
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