diff options
| author | Lucas Stach <dev@lynxeye.de> | 2013-12-03 20:56:59 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-12-04 14:59:39 +0100 |
| commit | 3504f23ed8726a07230a6d2ee02ad5de773d9485 (patch) | |
| tree | d2039f62d22d1e9998d3f37b9a7a7b8e35157a3d /drivers/clk/tegra/clk-tegra20.c | |
| parent | 1f52d7158798799aa4969e2c9e02b0179b4dc748 (diff) | |
| download | barebox-3504f23ed8726a07230a6d2ee02ad5de773d9485.tar.gz barebox-3504f23ed8726a07230a6d2ee02ad5de773d9485.tar.xz | |
clk: tegra: add SDMMC clocks
Provide peripheral clocks for the SD controller.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra20.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra20.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index b94b7bc888..f68c811a8d 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -295,6 +295,20 @@ static void tegra20_periph_init(void) clks[uarte] = tegra_clk_register_periph_nodiv("uarte", mux_pllpcm_clkm, ARRAY_SIZE(mux_pllpcm_clkm), car_base, CRC_CLK_SOURCE_UARTE, uarte, TEGRA_PERIPH_ON_APB); + + /* peripheral clocks with a divider */ + clks[sdmmc1] = tegra_clk_register_periph("sdmmc1", mux_pllpcm_clkm, + ARRAY_SIZE(mux_pllpcm_clkm), car_base, + CRC_CLK_SOURCE_SDMMC1, sdmmc1, 1); + clks[sdmmc2] = tegra_clk_register_periph("sdmmc2", mux_pllpcm_clkm, + ARRAY_SIZE(mux_pllpcm_clkm), car_base, + CRC_CLK_SOURCE_SDMMC2, sdmmc2, 1); + clks[sdmmc3] = tegra_clk_register_periph("sdmmc3", mux_pllpcm_clkm, + ARRAY_SIZE(mux_pllpcm_clkm), car_base, + CRC_CLK_SOURCE_SDMMC3, sdmmc3, 1); + clks[sdmmc4] = tegra_clk_register_periph("sdmmc4", mux_pllpcm_clkm, + ARRAY_SIZE(mux_pllpcm_clkm), car_base, + CRC_CLK_SOURCE_SDMMC4, sdmmc4, 1); } static struct tegra_clk_init_table init_table[] = { @@ -310,6 +324,10 @@ static struct tegra_clk_init_table init_table[] = { {uartc, pll_p, 0, 1}, {uartd, pll_p, 0, 1}, {uarte, pll_p, 0, 1}, + {sdmmc1, pll_p, 48000000, 0}, + {sdmmc2, pll_p, 48000000, 0}, + {sdmmc3, pll_p, 48000000, 0}, + {sdmmc4, pll_p, 48000000, 0}, {clk_max, clk_max, 0, 0}, /* sentinel */ }; |