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| author | Eugen Hristev <eugen.hristev@microchip.com> | 2020-04-13 09:52:01 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-15 12:31:24 +0200 |
| commit | ca48e1c9a639261555c778d0be48cb8b3a9339f7 (patch) | |
| tree | 31aa6791a4a0e4d18a24c3d3725e30434a655c83 /drivers/clk | |
| parent | 3d56dedee441a8240dd2dda6578485bd8c70e35f (diff) | |
| download | barebox-ca48e1c9a639261555c778d0be48cb8b3a9339f7.tar.gz barebox-ca48e1c9a639261555c778d0be48cb8b3a9339f7.tar.xz | |
clk: at91: allow 24 Mhz clock as input for PLL
The PLL input range needs to be able to allow 24 Mhz crystal as input
Update the range accordingly in plla characteristics struct
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1568183622-7858-1-git-send-email-eugen.hristev@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: c561e41ce4d2 ("clk: at91: add sama5d2 PMC driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
[afa: ported to barebox from Linux commit 81a6b601f9f49]
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/at91/sama5d2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 3daff89f59..61fdf256c0 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -27,7 +27,7 @@ static const struct clk_range plla_outputs[] = { }; static const struct clk_pll_characteristics plla_characteristics = { - .input = { .min = 12000000, .max = 12000000 }, + .input = { .min = 12000000, .max = 24000000 }, .num_output = ARRAY_SIZE(plla_outputs), .output = plla_outputs, .icpll = plla_icpll, |