CLK: clk-mux: Respect CLK_MUX_HIWORD_MASK flag

It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4ce86f43d1..22e131faae 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -45,6 +45,9 @@ static int clk_mux_set_parent(struct clk *clk, u8 idx)
 	val = readl(m->reg);
 	val &= ~(((1 << m->width) - 1) << m->shift);
 	val |= idx << m->shift;
+
+	if (clk->flags & CLK_MUX_HIWORD_MASK)
+		val |= ((1 << m->width) - 1) << (m->shift + 16);
 	writel(val, m->reg);
 
 	return 0;