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authorLucas Stach <dev@lynxeye.de>2014-05-14 22:45:34 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-05-15 14:17:12 +0200
commita1f576c1e9ddef034117d40fe4c80d8f589325a0 (patch)
treec0a869ff2707a8e0761740337495d1140d90d559 /drivers/clk
parentbbe4ddd10cbda700e6598bcc5a379b3147527d6b (diff)
downloadbarebox-a1f576c1e9ddef034117d40fe4c80d8f589325a0.tar.gz
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clk: tegra: allow to register clocks with 16 bit divider
Some peripherals have a double wide divider in front of them. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/tegra/clk-periph.c28
-rw-r--r--drivers/clk/tegra/clk.h4
2 files changed, 25 insertions, 7 deletions
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index c05e563aae..e4e5412b09 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -106,10 +106,10 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = {
.disable = clk_periph_disable,
};
-struct clk *_tegra_clk_register_periph(const char *name,
+static struct clk *_tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
void __iomem *clk_base, u32 reg_offset, u8 id, u8 flags,
- bool has_div)
+ int div)
{
struct tegra_clk_periph *periph;
int ret, gate_offs, rst_offs;
@@ -136,15 +136,20 @@ struct clk *_tegra_clk_register_periph(const char *name,
if (!periph->gate)
goto out_gate;
- if (has_div) {
+ if (div == 8) {
periph->div = tegra_clk_divider_alloc(NULL, NULL, clk_base +
- reg_offset, 0, TEGRA_DIVIDER_ROUND_UP, 0, 8, 1);
+ reg_offset, 0, TEGRA_DIVIDER_ROUND_UP, 0, 8, 1);
+ if (!periph->div)
+ goto out_div;
+ } else if (div == 16) {
+ periph->div = tegra_clk_divider_alloc(NULL, NULL, clk_base +
+ reg_offset, 0, TEGRA_DIVIDER_ROUND_UP, 0, 16, 0);
if (!periph->div)
goto out_div;
}
periph->hw.name = name;
- periph->hw.ops = has_div ? &tegra_clk_periph_ops :
+ periph->hw.ops = div ? &tegra_clk_periph_ops :
&tegra_clk_periph_nodiv_ops;
periph->hw.parent_names = parent_names;
periph->hw.num_parents = num_parents;
@@ -181,7 +186,7 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
{
return _tegra_clk_register_periph(name, parent_names, num_parents,
clk_base, reg_offset, id, flags,
- false);
+ 0);
}
struct clk *tegra_clk_register_periph(const char *name,
@@ -190,5 +195,14 @@ struct clk *tegra_clk_register_periph(const char *name,
{
return _tegra_clk_register_periph(name, parent_names, num_parents,
clk_base, reg_offset, id, flags,
- true);
+ 8);
+}
+
+struct clk *tegra_clk_register_periph_div16(const char *name,
+ const char **parent_names, int num_parents,
+ void __iomem *clk_base, u32 reg_offset, u8 id, u8 flags)
+{
+ return _tegra_clk_register_periph(name, parent_names, num_parents,
+ clk_base, reg_offset, id, flags,
+ 16);
}
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 6ce9f7e26d..d5d0730602 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -138,6 +138,10 @@ struct clk *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
void __iomem *clk_base, u32 reg_offset, u8 id, u8 flags);
+struct clk *tegra_clk_register_periph_div16(const char *name,
+ const char **parent_names, int num_parents,
+ void __iomem *clk_base, u32 reg_offset, u8 id, u8 flags);
+
/* struct clk_init_table - clock initialization table */
struct tegra_clk_init_table {
unsigned int clk_id;