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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-08 12:06:37 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-08 12:55:29 +0100 |
| commit | 4c2dbf170f9bb23b27ec4da9222967a0b28ae358 (patch) | |
| tree | 63e462dd8121cbef0f8bd024027d172ef5e31645 /drivers/clk | |
| parent | c3872b48ee97f7fd3d038b3173c69d8169659c73 (diff) | |
| download | barebox-4c2dbf170f9bb23b27ec4da9222967a0b28ae358.tar.gz barebox-4c2dbf170f9bb23b27ec4da9222967a0b28ae358.tar.xz | |
clk: imx6: emi_sel clock muxing
Adaption of kernel commit:
| commit 3b79cd15bfc5f1ddb5e387310fa3dbb09b81b552
| Author: Liu Ying <Ying.Liu@freescale.com>
| Date: Wed Jul 3 15:29:06 2013 +0800
|
| ARM: i.MX6Q: correct emi_sel clock muxing
|
| The correct muxing for emi_sel clock should be
| 2b'00 - 396M PFD
| 2b'01 - PLL3
| 2b'10 - AXI clk root
| 2b'11 - 352M PFD
|
| This patch corrects the muxing in the clock driver.
|
| Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
| Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imx6.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index a23aff5266..56ae09fc7b 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -139,6 +139,13 @@ static const char *enfc_sels_plus[] = { }; static const char *eim_sels[] = { + "pll2_pfd2_396m", + "pll3_usb_otg", + "axi", + "pll2_pfd0_352m", +}; + +static const char *eim_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", @@ -718,7 +725,7 @@ static int imx6_ccm_probe(struct device_d *dev) else clks[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels)); clks[IMX6QDL_CLK_EIM_SEL] = imx_clk_mux("eim_sel", base + 0x1c, 27, 2, eim_sels, ARRAY_SIZE(eim_sels)); - clks[IMX6QDL_CLK_EIM_SLOW_SEL] = imx_clk_mux("eim_slow_sel", base + 0x1c, 29, 2, eim_sels, ARRAY_SIZE(eim_sels)); + clks[IMX6QDL_CLK_EIM_SLOW_SEL] = imx_clk_mux("eim_slow_sel", base + 0x1c, 29, 2, eim_sels, ARRAY_SIZE(eim_slow_sels)); clks[IMX6QDL_CLK_VDO_AXI_SEL] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels)); clks[IMX6QDL_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels)); clks[IMX6QDL_CLK_CKO2_SEL] = imx_clk_mux("cko2_sel", base + 0x60, 16, 5, cko2_sels, ARRAY_SIZE(cko2_sels)); |