ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel

Use the potentially endianness-changing readl, writel and siblings
directly. They looks prettier and are the correct thing to do, as
even if the CPU is in big-endian mode, the peripherals are little-endian.

Unlike Linux, barebox readl,writel are the same Linux'
{readl,writel}_relaxed (they don't imply memory barriers)
and thus there shouldn't be any functional change.

Patch was generated by a mass search and replace. I looked it over,
adjust some whitespace and further verified by reviewing the output of

	git diff HEAD~1 --word-diff | \
		perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \
		-e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+'

which filters out the common case of lines where a single
__raw_{readT,writeT} had its __raw_ prefix stripped without any
further changes.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c
index e23f1e5ec4..6e86653480 100644
--- a/drivers/clocksource/timer-atmel-pit.c
+++ b/drivers/clocksource/timer-atmel-pit.c
@@ -35,8 +35,8 @@
 #include <linux/err.h>
 
 #define PIT_CPIV(x)	((x) & AT91_PIT_CPIV)
-#define pit_write(reg, val)	__raw_writel(val, pit_base + reg)
-#define pit_read(reg)		__raw_readl(pit_base + reg)
+#define pit_write(reg, val)	writel(val, pit_base + reg)
+#define pit_read(reg)		readl(pit_base + reg)
 
 static __iomem void *pit_base;