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authorSascha Hauer <s.hauer@pengutronix.de>2019-01-30 16:35:21 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-02-12 09:42:19 +0100
commit15b64fd520c20c51f4fe1388c149b661c4fb7073 (patch)
tree6801a193abe84ad1942f718e9f5af67a3d7e020b /drivers/mci
parent3354adee3920de4a5b2974db08f843180d0e5884 (diff)
downloadbarebox-15b64fd520c20c51f4fe1388c149b661c4fb7073.tar.gz
barebox-15b64fd520c20c51f4fe1388c149b661c4fb7073.tar.xz
mci: imx-esdhc: Add layerscape support
This adds support for the esdhc controller found on Layerscape SoCs. This means adding the compatible and a driver data to access the controller in bigendian mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mci')
-rw-r--r--drivers/mci/Kconfig2
-rw-r--r--drivers/mci/imx-esdhc.c14
2 files changed, 15 insertions, 1 deletions
diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 954f957bc7..2075151d67 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -82,7 +82,7 @@ config MCI_IMX
config MCI_IMX_ESDHC
bool "i.MX esdhc"
- depends on ARCH_IMX
+ depends on ARCH_IMX || ARCH_LAYERSCAPE
help
Enable this entry to add support to read and write SD cards on a
Freescale i.MX25/35/51 based system.
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 2bf7687d7b..a9c5440758 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -69,6 +69,8 @@
#define ESDHC_FLAG_HAVE_CAP1 BIT(6)
/* Need to access registers in bigendian mode */
#define ESDHC_FLAG_BIGENDIAN BIT(7)
+/* Enable cache snooping */
+#define ESDHC_FLAG_CACHE_SNOOPING BIT(8)
/*
* The IP has errata ERR004536
@@ -87,6 +89,9 @@
#define IMX_SDHCI_DLL_CTRL 0x60
#define IMX_SDHCI_MIX_CTRL_FBCLK_SEL (BIT(25))
+#define ESDHC_DMA_SYSCTL 0x40c /* Layerscape specific */
+#define ESDHC_SYSCTL_DMA_SNOOP BIT(6)
+
struct esdhc_soc_data {
u32 flags;
const char *clkidx;
@@ -604,6 +609,10 @@ static int esdhc_init(struct mci_host *mci, struct device_d *dev)
/* RSTA doesn't reset MMC_BOOT register, so manually reset it */
esdhc_write32(host, SDHCI_MMC_BOOT, 0);
+ /* Enable cache snooping */
+ if (host->socdata->flags & ESDHC_FLAG_CACHE_SNOOPING)
+ esdhc_setbits32(host, ESDHC_DMA_SYSCTL, ESDHC_SYSCTL_DMA_SNOOP);
+
/* Set the initial clock speed */
set_sysctl(mci, 400000);
@@ -739,6 +748,10 @@ static struct esdhc_soc_data usdhc_imx6sx_data = {
.clkidx = "per",
};
+static struct esdhc_soc_data esdhc_ls_data = {
+ .flags = ESDHC_FLAG_MULTIBLK_NO_INT | ESDHC_FLAG_BIGENDIAN,
+};
+
static __maybe_unused struct of_device_id fsl_esdhc_compatible[] = {
{ .compatible = "fsl,imx25-esdhc", .data = &esdhc_imx25_data },
{ .compatible = "fsl,imx50-esdhc", .data = &esdhc_imx53_data },
@@ -748,6 +761,7 @@ static __maybe_unused struct of_device_id fsl_esdhc_compatible[] = {
{ .compatible = "fsl,imx6sl-usdhc", .data = &usdhc_imx6sl_data },
{ .compatible = "fsl,imx6sx-usdhc", .data = &usdhc_imx6sx_data },
{ .compatible = "fsl,imx8mq-usdhc", .data = &usdhc_imx6sx_data },
+ { .compatible = "fsl,ls1046a-esdhc",.data = &esdhc_ls_data },
{ /* sentinel */ }
};