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authorAhmad Fatoum <a.fatoum@pengutronix.de>2019-05-23 17:39:35 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-05-24 08:16:01 +0200
commit9a307e8da54d34e328d7face138bd096e99bb746 (patch)
treed864efa41325b6a851144efaf0a65a99df874b84 /drivers/mci
parentca3077068c561fbffd08a2665b3247be37eee06a (diff)
downloadbarebox-9a307e8da54d34e328d7face138bd096e99bb746.tar.gz
barebox-9a307e8da54d34e328d7face138bd096e99bb746.tar.xz
ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel
Use the potentially endianness-changing readl, writel and siblings directly. They looks prettier and are the correct thing to do, as even if the CPU is in big-endian mode, the peripherals are little-endian. Unlike Linux, barebox readl,writel are the same Linux' {readl,writel}_relaxed (they don't imply memory barriers) and thus there shouldn't be any functional change. Patch was generated by a mass search and replace. I looked it over, adjust some whitespace and further verified by reviewing the output of git diff HEAD~1 --word-diff | \ perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \ -e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+' which filters out the common case of lines where a single __raw_{readT,writeT} had its __raw_ prefix stripped without any further changes. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mci')
-rw-r--r--drivers/mci/atmel-mci-regs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mci/atmel-mci-regs.h b/drivers/mci/atmel-mci-regs.h
index af1dba00f9..2866e3eb77 100644
--- a/drivers/mci/atmel-mci-regs.h
+++ b/drivers/mci/atmel-mci-regs.h
@@ -138,9 +138,9 @@
/* Register access macros */
#define atmci_readl(port,reg) \
- __raw_readl((port)->regs + reg)
+ readl((port)->regs + reg)
#define atmci_writel(port,reg,value) \
- __raw_writel((value), (port)->regs + reg)
+ writel((value), (port)->regs + reg)
/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
#ifdef CONFIG_AVR32