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authorMarco Felsch <m.felsch@pengutronix.de>2024-01-16 18:07:36 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2024-01-19 09:00:16 +0100
commite10ea01ec02322e7c82ea6013a042d1b1702ee2a (patch)
tree916c9efeef6d8964055f78864d5413d42c8c48b2 /drivers/mci
parent532cdae92630d389da67b7099ada2fbb49252a5f (diff)
downloadbarebox-e10ea01ec02322e7c82ea6013a042d1b1702ee2a.tar.gz
barebox-e10ea01ec02322e7c82ea6013a042d1b1702ee2a.tar.xz
ARM: i.MX8M: allow board code to configure the bl33 loadaddr
At an helper to load_and_start the image on arbitrary load addresses. This should be taken with caution since it requires to configure the TF-A correctly as well, therefore the functions are prefixt with '__'. One use case of the new helper is to place OP-TEE at the very beginning of the DRAM and barebox afterwards e.g. if multiple DRAM setups are required for the platform/som-family. A nice side effect of this change is to bundle the usage of MX8M*_ATF_BL33_BASE_ADDR at a single place. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20240116170738.209954-17-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mci')
-rw-r--r--drivers/mci/imx-esdhc-pbl.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c
index a0cea1f95e..304397a73f 100644
--- a/drivers/mci/imx-esdhc-pbl.c
+++ b/drivers/mci/imx-esdhc-pbl.c
@@ -239,6 +239,7 @@ int imx7_esdhc_start_image(int instance)
/**
* imx8m_esdhc_load_image - Load and optionally start an image from USDHC controller
* @instance: The USDHC controller instance (0..2)
+ * @bl33: Where to load the bl33 barebox image
*
* This uses esdhc_start_image() to load an image from SD/MMC. It is
* assumed that the image is the currently running barebox image (This
@@ -248,7 +249,7 @@ int imx7_esdhc_start_image(int instance)
* Return: If image successfully loaded, returns 0.
* A negative error code is returned when this function fails.
*/
-int imx8m_esdhc_load_image(int instance)
+int imx8m_esdhc_load_image(int instance, void *bl33)
{
struct esdhc_soc_data data;
struct fsl_esdhc_host host = { 0 };
@@ -259,13 +260,14 @@ int imx8m_esdhc_load_image(int instance)
return ret;
return esdhc_load_image(&host, MX8M_DDR_CSD1_BASE_ADDR,
- MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K, SZ_1K,
+ (ptrdiff_t)bl33, SZ_32K, SZ_1K,
false);
}
/**
* imx8mp_esdhc_load_image - Load and optionally start an image from USDHC controller
* @instance: The USDHC controller instance (0..2)
+ * @bl33: Where to load the bl33 barebox image
*
* This uses esdhc_start_image() to load an image from SD/MMC. It is
* assumed that the image is the currently running barebox image (This
@@ -275,7 +277,7 @@ int imx8m_esdhc_load_image(int instance)
* Return: If image successfully loaded, returns 0.
* A negative error code is returned when this function fails.
*/
-int imx8mp_esdhc_load_image(int instance)
+int imx8mp_esdhc_load_image(int instance, void *bl33)
{
struct esdhc_soc_data data;
struct fsl_esdhc_host host = { 0 };
@@ -289,10 +291,10 @@ int imx8mp_esdhc_load_image(int instance)
offset = esdhc_bootpart_active(&host)? 0 : SZ_32K;
return esdhc_load_image(&host, MX8M_DDR_CSD1_BASE_ADDR,
- MX8MQ_ATF_BL33_BASE_ADDR, offset, 0, false);
+ (ptrdiff_t)bl33, offset, 0, false);
}
-int imx8mn_esdhc_load_image(int instance)
+int imx8mn_esdhc_load_image(int instance, void *bl33)
__alias(imx8mp_esdhc_load_image);
#endif