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authorAndrey Panov <rockford@yandex.ru>2015-01-17 15:54:35 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2015-01-19 08:38:12 +0100
commit58475f4599ebd556d47d7f632a78f666d2dfcfd4 (patch)
treef2a851469c496297cb73f9bf578530c1c2a30281 /drivers/mci
parent78582e53dcb2c6f42282ddf27b66e5bc5b7202cc (diff)
downloadbarebox-58475f4599ebd556d47d7f632a78f666d2dfcfd4.tar.gz
barebox-58475f4599ebd556d47d7f632a78f666d2dfcfd4.tar.xz
MMC: IMX: Reset MMC_BOOT register after controller reset.
This helps with EMMC detection when booting from EMMC directly. Taken from u-boot. Signed-off-by: Andrey Panov <rockford@yandex.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mci')
-rw-r--r--drivers/mci/imx-esdhc.c3
-rw-r--r--drivers/mci/sdhci.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 239cd375fa..23bdc1fb15 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -471,6 +471,9 @@ static int esdhc_init(struct mci_host *mci, struct device_d *dev)
esdhc_write32(regs + SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET,
SYSCTL_HCKEN | SYSCTL_IPGEN);
+ /* RSTA doesn't reset MMC_BOOT register, so manually reset it */
+ esdhc_write32(regs + SDHCI_MMC_BOOT, 0);
+
/* Set the initial clock speed */
set_sysctl(mci, 400000);
diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
index b67818485b..82a692e732 100644
--- a/drivers/mci/sdhci.h
+++ b/drivers/mci/sdhci.h
@@ -18,6 +18,7 @@
#define SDHCI_SIGNAL_ENABLE 0x38
#define SDHCI_ACMD12_ERR__HOST_CONTROL2 0x3C
#define SDHCI_CAPABILITIES 0x40
+#define SDHCI_MMC_BOOT 0xC4
#define COMMAND_CMD(x) ((x & 0x3f) << 24)
#define COMMAND_CMDTYP_NORMAL 0x0