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authorSascha Hauer <s.hauer@pengutronix.de>2010-08-03 09:31:38 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2010-08-03 09:31:38 +0200
commit139ec08127825f2fdc4d0386d26f1fad9f745c2c (patch)
tree65e0aa4d72f548dd1e8771fc80e918dcbc5365ec /drivers/mtd/nand/Kconfig
parent68d0d31d41d9034a6246991ee1d486dc805ff479 (diff)
parent6f354bc067482fbe78e9148c3a1501188b18f22d (diff)
downloadbarebox-139ec08127825f2fdc4d0386d26f1fad9f745c2c.tar.gz
barebox-139ec08127825f2fdc4d0386d26f1fad9f745c2c.tar.xz
Merge branch 'next'
Diffstat (limited to 'drivers/mtd/nand/Kconfig')
-rw-r--r--drivers/mtd/nand/Kconfig101
1 files changed, 101 insertions, 0 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
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+menuconfig NAND
+ bool "NAND support "
+ select MTD_NAND_IDS
+ help
+ This enables support for accessing all type of NAND flash
+ devices. For further information see
+ <http://www.linux-mtd.infradead.org/doc/nand.html>.
+
+if NAND
+
+config NAND_IMX
+ bool
+ prompt "i.MX NAND driver"
+ depends on ARCH_IMX21 || ARCH_IMX27 || ARCH_IMX31 || ARCH_IMX35 || ARCH_IMX25
+
+config NAND_IMX_BOOT
+ bool
+ prompt "Support Starting barebox from NAND"
+ depends on NAND_IMX || NAND_IMX_V2
+
+config NAND_OMAP_GPMC
+ tristate "NAND Flash Support for GPMC based OMAP platforms"
+ depends on ((ARCH_OMAP2 || ARCH_OMAP3) && GPMC)
+ help
+ Support for NAND flash using GPMC. GPMC is a common memory
+ interface found on Texas Instrument's OMAP platforms
+
+config NAND_ATMEL
+ bool
+ prompt "Atmel (AT91SAM9xxx) NAND driver"
+ depends on ARCH_AT91
+
+config NAND_S3C24X0
+ bool
+ prompt "Samsung S3C24X0 NAND driver"
+ depends on ARCH_S3C24xx
+ help
+ Add support for processor's NAND device controller.
+
+config MTD_NAND_VERIFY_WRITE
+ bool "Verify NAND page writes"
+ help
+ This adds an extra check when data is written to the flash. The
+ NAND flash device internally checks only bits transitioning
+ from 1 to 0. There is a rare possibility that even though the
+ device thinks the write was successful, a bit could have been
+ flipped accidentally due to device wear or something else.
+
+config MTD_NAND_ECC_SMC
+ bool "NAND ECC Smart Media byte order"
+ default n
+ help
+ Software ECC according to the Smart Media Specification.
+ The original Linux implementation had byte 0 and 1 swapped.
+
+config MTD_NAND_MUSEUM_IDS
+ bool "Enable chip ids for obsolete ancient NAND devices"
+ depends on MTD_NAND
+ default n
+ help
+ Enable this option only when your board has first generation
+ NAND chips (page size 256 byte, erase size 4-8KiB). The IDs
+ of these chips were reused by later, larger chips.
+
+config MTD_NAND_IDS
+ tristate
+
+config MTD_NAND_DISKONCHIP
+ tristate "DiskOnChip 2000, Millennium and Millennium Plus"
+ depends on EXPERIMENTAL && BROKEN
+ help
+ This is a reimplementation of M-Systems DiskOnChip 2000,
+ Millennium and Millennium Plus as a standard NAND device driver,
+ as opposed to the earlier self-contained MTD device drivers.
+ This should enable, among other things, proper JFFS2 operation on
+ these devices.
+
+config MTD_NAND_DISKONCHIP_BBTWRITE
+ bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
+ depends on MTD_NAND_DISKONCHIP
+ help
+ On DiskOnChip devices shipped with the INFTL filesystem (Millennium
+ and 2000 TSOP/Alon), Linux reserves some space at the end of the
+ device for the Bad Block Table (BBT). If you have existing INFTL
+ data on your device (created by non-Linux tools such as M-Systems'
+ DOS drivers), your data might overlap the area Linux wants to use for
+ the BBT. If this is a concern for you, leave this option disabled and
+ Linux will not write BBT data into this area.
+ The downside of leaving this option disabled is that if bad blocks
+ are detected by Linux, they will not be recorded in the BBT, which
+ could cause future problems.
+ Once you enable this option, new filesystems (INFTL or others, created
+ in Linux or other operating systems) will not use the reserved area.
+ The only reason not to enable this option is to prevent damage to
+ preexisting filesystems.
+ Even if you leave this disabled, you can enable BBT writes at module
+ load time (assuming you build diskonchip as a module) with the module
+ parameter "inftl_bbt_write=1".
+
+
+endif