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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-12-31 16:21:29 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2012-01-02 12:08:24 +0100
commit809f0f6327241504b5071622a8d573255f91a875 (patch)
treebb6a091d5175a44d1bae8495bec1509f981dc8d1 /drivers/mtd/nand/atmel_nand.c
parentde8c4de5ef7d8962b36c396a75e17a655fc247b2 (diff)
downloadbarebox-809f0f6327241504b5071622a8d573255f91a875.tar.gz
barebox-809f0f6327241504b5071622a8d573255f91a875.tar.xz
mtd: atmel_nand: optimize read/write buffer functions
For PIO NAND access functions, we use the features of the SMC: - no need to take into account the NAND bus width: SMC will deal with this - use of an IO memcpy on the NAND chip-select space is able to generate proper SMC behavior. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mtd/nand/atmel_nand.c')
-rw-r--r--drivers/mtd/nand/atmel_nand.c33
1 files changed, 8 insertions, 25 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 534a065783..95fda45d3d 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -148,30 +148,16 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
*/
static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
{
- struct nand_chip *nand_chip = mtd->priv;
+ struct nand_chip *chip = mtd->priv;
- readsb(nand_chip->IO_ADDR_R, buf, len);
-}
-
-static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
-{
- struct nand_chip *nand_chip = mtd->priv;
-
- readsw(nand_chip->IO_ADDR_R, buf, len / 2);
+ memcpy_fromio(buf, chip->IO_ADDR_R, len);
}
static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
{
- struct nand_chip *nand_chip = mtd->priv;
+ struct nand_chip *chip = mtd->priv;
- writesb(nand_chip->IO_ADDR_W, buf, len);
-}
-
-static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
-{
- struct nand_chip *nand_chip = mtd->priv;
-
- writesw(nand_chip->IO_ADDR_W, buf, len / 2);
+ memcpy_toio(chip->IO_ADDR_W, buf, len);
}
/*
@@ -417,14 +403,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
nand_chip->chip_delay = 20; /* 20us command delay time */
- if (host->board->bus_width_16) { /* 16-bit bus width */
+ if (host->board->bus_width_16) /* 16-bit bus width */
nand_chip->options |= NAND_BUSWIDTH_16;
- nand_chip->read_buf = atmel_read_buf16;
- nand_chip->write_buf = atmel_write_buf16;
- } else {
- nand_chip->read_buf = atmel_read_buf;
- nand_chip->write_buf = atmel_write_buf;
- }
+
+ nand_chip->read_buf = atmel_read_buf;
+ nand_chip->write_buf = atmel_write_buf;
atmel_nand_enable(host);