summaryrefslogtreecommitdiffstats
path: root/drivers/mtd/nand/nand_mxs.c
diff options
context:
space:
mode:
authorDmitry Lavnikevich <d.lavnikevich@sam-solutions.com>2014-11-21 16:35:07 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2014-11-26 16:43:12 +0100
commit54961378f0d82e8cd825474927a28f3289cb87a3 (patch)
tree67ded06e2d3a98fa630664e8dbb70a6f29ed6cab /drivers/mtd/nand/nand_mxs.c
parent36d08119e9d96fe9f730cf4a86e6de6068bc91a4 (diff)
downloadbarebox-54961378f0d82e8cd825474927a28f3289cb87a3.tar.gz
barebox-54961378f0d82e8cd825474927a28f3289cb87a3.tar.xz
imx6: clk: Gate off ENFC clock before setting clock rate
This fixes NAND initialization issue which appears occasionally on some i.MX6 SoCs (particulary was observed on phyCARD-i.MX6 with i.MX6Solo). Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mtd/nand/nand_mxs.c')
-rw-r--r--drivers/mtd/nand/nand_mxs.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 8989de0272..94101a3d98 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -1266,6 +1266,7 @@ static int mxs_nand_probe(struct device_d *dev)
return PTR_ERR(nand_info->clk);
if (mxs_nand_is_imx6(nand_info)) {
+ clk_disable(nand_info->clk);
clk_set_rate(nand_info->clk, 96000000);
clk_enable(nand_info->clk);
nand_info->dma_channel_base = 0;