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authorSascha Hauer <s.hauer@pengutronix.de>2014-10-17 14:46:11 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2015-08-26 15:14:00 +0200
commit3e1adbf832b8f420906e6d5cbf5bec7617545c7e (patch)
tree28f7de3e43ee9021c312e05209e8b1b060b86a60 /drivers/mtd/spi-nor/cadence-quadspi.c
parentf38ba32965c5686c062884fab2e9f505015af82a (diff)
downloadbarebox-3e1adbf832b8f420906e6d5cbf5bec7617545c7e.tar.gz
barebox-3e1adbf832b8f420906e6d5cbf5bec7617545c7e.tar.xz
mtd: m25p80: make it possible to use large blocks if desired
Some SPI NOR flashes support 4K erase blocks. 4K erase blocks do not work with UBIFS which needs a minimum erase block size of 15360 bytes. Also bigger sectors are faster to erase. This patch adds a device tree option to use the bigger blocks instead of the default 4K blocks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/mtd/spi-nor/cadence-quadspi.c')
-rw-r--r--drivers/mtd/spi-nor/cadence-quadspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index dce29ca0ea..ff7bb7a5d8 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -1078,7 +1078,7 @@ static int cqspi_setup_flash(struct device_d *dev,
nor->write = cqspi_write;
nor->erase = cqspi_erase;
- ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD);
+ ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD, false);
if (ret)
goto probe_failed;