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authorSascha Hauer <s.hauer@pengutronix.de>2016-08-18 16:05:37 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-08-18 16:17:04 +0200
commita2b88410eaa362e0bbd86321c9b8d3f4e59363a2 (patch)
tree4bda89597f86fa8e4b4067cbb2f1dfe059d09836 /drivers/mtd
parent32570fd027b571ec7e965a04b394ae9c80081ba6 (diff)
downloadbarebox-a2b88410eaa362e0bbd86321c9b8d3f4e59363a2.tar.gz
barebox-a2b88410eaa362e0bbd86321c9b8d3f4e59363a2.tar.xz
mtd: nand-imx: Optimize timing for i.MX25
So far we relied on the clock rate as configured by reset default or board code. Also we did not touch the symmetric mode bit. Use the ONFI provided timing parameters to configure the clock rate for the Nand controller. Also symmetric mode (EDO mode) when needed. This is done for v2 controllers (i.MX25/35) only, other controllers need other setup code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/nand_imx.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index 47d9d9a452..6f31c28ec6 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -24,6 +24,7 @@
#include <init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
+#include <linux/clk.h>
#include <mach/generic.h>
#include <mach/imx-nand.h>
#include <io.h>
@@ -811,6 +812,32 @@ static void preset_v2(struct mtd_info *mtd)
struct nand_chip *nand_chip = mtd->priv;
struct imx_nand_host *host = nand_chip->priv;
uint16_t config1 = 0;
+ int mode;
+
+ mode = onfi_get_async_timing_mode(nand_chip);
+ if (mode != ONFI_TIMING_MODE_UNKNOWN && !IS_ERR(host->clk)) {
+ const struct nand_sdr_timings *timings;
+
+ mode = fls(mode) - 1;
+ if (mode < 0)
+ mode = 0;
+
+ timings = onfi_async_timing_mode_to_sdr_timings(mode);
+ if (!IS_ERR(timings)) {
+ unsigned long rate;
+ int tRC_min_ns = timings->tRC_min / 1000;
+
+ rate = 1000000000 / tRC_min_ns;
+ if (tRC_min_ns < 30)
+ /* If tRC is smaller than 30ns we have to use EDO timing */
+ config1 |= NFC_V1_V2_CONFIG1_ONE_CYCLE;
+ else
+ /* Otherwise we have two clock cycles per access */
+ rate *= 2;
+
+ clk_set_rate(host->clk, rate);
+ }
+ }
config1 |= NFC_V2_CONFIG1_FP_INT;
@@ -1181,6 +1208,9 @@ static int __init imxnd_probe(struct device_d *dev)
host->data_buf = (uint8_t *)(host + 1);
+ /* No error check, not all SoCs provide a clk yet */
+ host->clk = clk_get(dev, NULL);
+
if (nfc_is_v1() || nfc_is_v21()) {
host->send_cmd = send_cmd_v1_v2;
host->send_addr = send_addr_v1_v2;