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| author | Jan Luebbe <jlu@pengutronix.de> | 2012-09-28 18:17:46 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-09-29 12:58:18 +0200 |
| commit | 81b5356215781749cdd750b05eb7e04b7e745483 (patch) | |
| tree | 9527a1a355acc6c3164b05c3ad3c9637d5926fae /drivers/net/davinci_emac.c | |
| parent | 419ae85d4418ced203475ab4fbbfc1d37d8ea14e (diff) | |
| download | barebox-81b5356215781749cdd750b05eb7e04b7e745483.tar.gz barebox-81b5356215781749cdd750b05eb7e04b7e745483.tar.xz | |
davinci_emac: get rid of mdio wrapper functions
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net/davinci_emac.c')
| -rw-r--r-- | drivers/net/davinci_emac.c | 51 |
1 files changed, 19 insertions, 32 deletions
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 91fd226919..7d4dbdcdd9 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -122,64 +122,51 @@ static void davinci_eth_mdio_enable(struct davinci_emac_priv *priv) while (readl(priv->adap_mdio + EMAC_MDIO_CONTROL) & MDIO_CONTROL_IDLE); } -/* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */ -static int davinci_eth_phy_read(struct davinci_emac_priv *priv, uint8_t phy_addr, uint8_t reg_num, uint16_t *data) +static int davinci_miibus_read(struct mii_bus *bus, int addr, int reg) { - int tmp; + struct davinci_emac_priv *priv = bus->priv; + uint16_t value; + int tmp; while (readl(priv->adap_mdio + EMAC_MDIO_USERACCESS0) & MDIO_USERACCESS0_GO); writel(MDIO_USERACCESS0_GO | MDIO_USERACCESS0_WRITE_READ | - ((reg_num & 0x1f) << 21) | - ((phy_addr & 0x1f) << 16), + ((reg & 0x1f) << 21) | + ((addr & 0x1f) << 16), priv->adap_mdio + EMAC_MDIO_USERACCESS0); /* Wait for command to complete */ while ((tmp = readl(priv->adap_mdio + EMAC_MDIO_USERACCESS0)) & MDIO_USERACCESS0_GO); if (tmp & MDIO_USERACCESS0_ACK) { - *data = tmp & 0xffff; - dev_dbg(priv->dev, "emac_phy_read: addr=0x%02x reg=0x%02x data=0x%04x\n", - phy_addr, reg_num, *data); - return 1; + value = tmp & 0xffff; + dev_dbg(priv->dev, "davinci_miibus_read: addr=0x%02x reg=0x%02x value=0x%04x\n", + addr, reg, value); + return value; } - *data = -1; - return 0; + return -1; } -/* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */ -static int davinci_eth_phy_write(struct davinci_emac_priv *priv, uint8_t phy_addr, uint8_t reg_num, uint16_t data) +static int davinci_miibus_write(struct mii_bus *bus, int addr, int reg, u16 value) { + struct davinci_emac_priv *priv = bus->priv; while (readl(priv->adap_mdio + EMAC_MDIO_USERACCESS0) & MDIO_USERACCESS0_GO); - dev_dbg(priv->dev, "emac_phy_write: addr=0x%02x reg=0x%02x data=0x%04x\n", - phy_addr, reg_num, data); + dev_dbg(priv->dev, "davinci_miibus_write: addr=0x%02x reg=0x%02x value=0x%04x\n", + addr, reg, value); writel(MDIO_USERACCESS0_GO | MDIO_USERACCESS0_WRITE_WRITE | - ((reg_num & 0x1f) << 21) | - ((phy_addr & 0x1f) << 16) | - (data & 0xffff), + ((reg & 0x1f) << 21) | + ((addr & 0x1f) << 16) | + (value & 0xffff), priv->adap_mdio + EMAC_MDIO_USERACCESS0); /* Wait for command to complete */ while (readl(priv->adap_mdio + EMAC_MDIO_USERACCESS0) & MDIO_USERACCESS0_GO); - return 1; -} - -static int davinci_miibus_read(struct mii_bus *bus, int addr, int reg) -{ - struct davinci_emac_priv *priv = bus->priv; - uint16_t value = 0; - return davinci_eth_phy_read(priv, addr, reg, &value) ? value : -1; -} - -static int davinci_miibus_write(struct mii_bus *bus, int addr, int reg, u16 value) -{ - struct davinci_emac_priv *priv = (struct davinci_emac_priv *)bus->priv; - return davinci_eth_phy_write(priv, addr, reg, value) ? 0 : -1; + return 0; } static int davinci_emac_get_ethaddr(struct eth_device *edev, unsigned char *adr) |