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author | Oleksij Rempel <o.rempel@pengutronix.de> | 2019-08-14 12:27:28 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-16 13:42:13 +0200 |
commit | befd110b59220e6b3e2157f275c61c7bef10ad5f (patch) | |
tree | 0e4481979901081fb8274bb8d445c2335afd4a43 /drivers/net/macb.c | |
parent | a3e62ffc7341254fd754886e560865556bc731c8 (diff) | |
download | barebox-befd110b59220e6b3e2157f275c61c7bef10ad5f.tar.gz barebox-befd110b59220e6b3e2157f275c61c7bef10ad5f.tar.xz |
net: macb: init multiple dummy TX queues
Microchip SAMA5D27 has more then one TX queue. So it will
go in to TX timeout if only one was initialized.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net/macb.c')
-rw-r--r-- | drivers/net/macb.c | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/drivers/net/macb.c b/drivers/net/macb.c index a0411d6e4b..0b3c909433 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -322,6 +322,29 @@ static void macb_configure_dma(struct macb_device *bp) } } +static int gmac_init_dummy_tx_queues(struct macb_device *macb) +{ + int i, num_queues = 1; + u32 queue_mask; + + /* bit 0 is never set but queue 0 always exists */ + queue_mask = gem_readl(macb, DCFG6) & 0xff; + queue_mask |= 0x1; + + for (i = 1; i < MACB_MAX_QUEUES; i++) + if (queue_mask & (1 << i)) + num_queues++; + + macb->gem_q1_descs[0].addr = 0; + macb->gem_q1_descs[0].ctrl = MACB_BIT(TX_WRAP) | + MACB_BIT(TX_LAST) | MACB_BIT(TX_USED); + + for (i = 1; i < num_queues; i++) + gem_writel_queue_TBQP(macb, &macb->gem_q1_descs[0], i - 1); + + return 0; +} + static void macb_init(struct macb_device *macb) { unsigned long paddr, val = 0; @@ -357,16 +380,13 @@ static void macb_init(struct macb_device *macb) macb_writel(macb, TBQP, (ulong)macb->tx_ring); if (macb->is_gem && macb->gem_q1_descs) { - /* Disable the second priority queue */ - macb->gem_q1_descs[0].addr = 0; - macb->gem_q1_descs[0].ctrl = MACB_BIT(TX_WRAP) | - MACB_BIT(TX_LAST) | - MACB_BIT(TX_USED); + gmac_init_dummy_tx_queues(macb); + + /* Disable the second priority rx queue */ macb->gem_q1_descs[1].addr = MACB_BIT(RX_USED) | MACB_BIT(RX_WRAP); macb->gem_q1_descs[1].ctrl = 0; - gem_writel(macb, TQ1, (ulong)&macb->gem_q1_descs[0]); gem_writel(macb, RQ1, (ulong)&macb->gem_q1_descs[1]); } |