diff options
| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2019-05-23 17:39:35 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-05-24 08:16:01 +0200 |
| commit | 9a307e8da54d34e328d7face138bd096e99bb746 (patch) | |
| tree | d864efa41325b6a851144efaf0a65a99df874b84 /drivers/net/macb.h | |
| parent | ca3077068c561fbffd08a2665b3247be37eee06a (diff) | |
| download | barebox-9a307e8da54d34e328d7face138bd096e99bb746.tar.gz barebox-9a307e8da54d34e328d7face138bd096e99bb746.tar.xz | |
ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel
Use the potentially endianness-changing readl, writel and siblings
directly. They looks prettier and are the correct thing to do, as
even if the CPU is in big-endian mode, the peripherals are little-endian.
Unlike Linux, barebox readl,writel are the same Linux'
{readl,writel}_relaxed (they don't imply memory barriers)
and thus there shouldn't be any functional change.
Patch was generated by a mass search and replace. I looked it over,
adjust some whitespace and further verified by reviewing the output of
git diff HEAD~1 --word-diff | \
perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \
-e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+'
which filters out the common case of lines where a single
__raw_{readT,writeT} had its __raw_ prefix stripped without any
further changes.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net/macb.h')
| -rw-r--r-- | drivers/net/macb.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/macb.h b/drivers/net/macb.h index 979f53cb71..fda4d08663 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -334,13 +334,13 @@ /* Register access macros */ #define macb_readl(port,reg) \ - __raw_readl((port)->regs + MACB_##reg) + readl((port)->regs + MACB_##reg) #define macb_writel(port,reg,value) \ - __raw_writel((value), (port)->regs + MACB_##reg) + writel((value), (port)->regs + MACB_##reg) #define gem_readl(port, reg) \ - __raw_readl((port)->regs + GEM_##reg) + readl((port)->regs + GEM_##reg) #define gem_writel(port, reg, value) \ - __raw_writel((value), (port)->regs + GEM_##reg) + writel((value), (port)->regs + GEM_##reg) /* * Conditional GEM/MACB macros. These perform the operation to the correct |