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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2020-02-10 19:08:31 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-02-12 08:35:53 +0100 |
| commit | b75cf99b9ef3864a9c626d7a168e32d530171c81 (patch) | |
| tree | 62500db7c17822ac3d3837e2de1bb91f435fb6ac /drivers/net | |
| parent | f59bd53e9d61df69d0a73bf389359c7fa58f0834 (diff) | |
| download | barebox-b75cf99b9ef3864a9c626d7a168e32d530171c81.tar.gz barebox-b75cf99b9ef3864a9c626d7a168e32d530171c81.tar.xz | |
net: designware: socfpga: fix possible invalid pointer deref
In cases where the reset controller specification in the device tree is
malformed, we get an error pointer back from reset_control_get. This
compares unequal to NULL and would cause an access violation when passed
to reset_control_(de)?assert.
Fix this by propagating the error. When the reset controller is missing,
reset_control_(de)?assert will be passed NULL pointers, rendering them
no-ops.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/designware_socfpga.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/net/designware_socfpga.c b/drivers/net/designware_socfpga.c index ce3ac38ebe..d6c28af45e 100644 --- a/drivers/net/designware_socfpga.c +++ b/drivers/net/designware_socfpga.c @@ -77,8 +77,7 @@ static int socfpga_gen5_set_phy_mode(struct socfpga_dwc_dev *dwc_dev) } /* Assert reset to the enet controller before changing the phy mode */ - if (eth_dev->rst) - reset_control_assert(eth_dev->rst); + reset_control_assert(eth_dev->rst); ctrl = readl(dwc_dev->sys_mgr_base + reg_offset); ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift); @@ -104,8 +103,7 @@ static int socfpga_gen5_set_phy_mode(struct socfpga_dwc_dev *dwc_dev) /* Deassert reset for the phy configuration to be sampled by * the enet controller, and operation to start in requested mode */ - if (eth_dev->rst) - reset_control_deassert(eth_dev->rst); + reset_control_deassert(eth_dev->rst); return 0; } @@ -124,8 +122,7 @@ static int socfpga_gen10_set_phy_mode(struct socfpga_dwc_dev *dwc_dev) } /* Assert reset to the enet controller before changing the phy mode */ - if (eth_dev->rst) - reset_control_assert(eth_dev->rst); + reset_control_assert(eth_dev->rst); ctrl = readl(dwc_dev->sys_mgr_base + reg_offset); ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift); @@ -151,8 +148,7 @@ static int socfpga_gen10_set_phy_mode(struct socfpga_dwc_dev *dwc_dev) /* Deassert reset for the phy configuration to be sampled by * the enet controller, and operation to start in requested mode */ - if (eth_dev->rst) - reset_control_deassert(eth_dev->rst); + reset_control_deassert(eth_dev->rst); return 0; } @@ -212,8 +208,10 @@ static int socfpga_dwc_ether_probe(struct device_d *dev) return PTR_ERR(priv); priv->rst = reset_control_get(dev, NULL); - if (IS_ERR(priv->rst)) - dev_warn(dev, "No reset lines.\n"); + if (IS_ERR(priv->rst)) { + dev_err(dev, "Invalid reset lines.\n"); + return PTR_ERR(priv->rst); + } dwc_dev->priv = priv; |