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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2018-12-16 21:18:34 -0800 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-08 16:28:47 +0100 |
| commit | 1d7763ae0b1bbaa2367761a8f216dba08ce37c4e (patch) | |
| tree | e25d3bd85a5464d9b76e3622eeaa3f9503349772 /drivers/pci/pcie-designware.h | |
| parent | 0aa89c9deaebf3d1258814f38930abd8ec0987ab (diff) | |
| download | barebox-1d7763ae0b1bbaa2367761a8f216dba08ce37c4e.tar.gz barebox-1d7763ae0b1bbaa2367761a8f216dba08ce37c4e.tar.xz | |
PCI: designware: Add generic dw_pcie_wait_for_link()
Port of Linux commit 886bc5ceb5cc3ad4b219502d72b277e3c3255a32
Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and
spear13xx) had similar loops waiting for the link to come up.
Add a generic dw_pcie_wait_for_link() for use by all these drivers so the
waiting is done consistently, e.g., always using usleep_range() rather than
mdelay() and using similar timeouts and retry counts.
Note that this changes the Keystone link training/wait for link strategy,
so we initiate link training, then wait longer for the link to come up
before re-initiating link training.
[bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c]
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
NOTE: For some reason, all of the changes to imx6_pcie_wait_for_link()
made in 4d107d3b5a686b5834e533a00b73bf7b1cf59df7 are actually not
present 886bc5ceb5cc3ad4b219502d72b277e3c3255a32. So there isn't
really a kernel commit corresponding to removal of the large comment
block or check for !(reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING)
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pci/pcie-designware.h')
| -rw-r--r-- | drivers/pci/pcie-designware.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/pcie-designware.h b/drivers/pci/pcie-designware.h index b8b85c575d..051511a267 100644 --- a/drivers/pci/pcie-designware.h +++ b/drivers/pci/pcie-designware.h @@ -14,6 +14,10 @@ #ifndef _PCIE_DESIGNWARE_H #define _PCIE_DESIGNWARE_H +/* Parameters for the waiting for link up routine */ +#define LINK_WAIT_MAX_RETRIES 10 +#define LINK_WAIT_USLEEP_MAX 100000 + struct pcie_port { struct device_d *dev; u8 root_bus_nr; @@ -66,4 +70,6 @@ int dw_pcie_link_up(struct pcie_port *pp); void dw_pcie_setup_rc(struct pcie_port *pp); int dw_pcie_host_init(struct pcie_port *pp); +int dw_pcie_wait_for_link(struct pcie_port *pp); + #endif /* _PCIE_DESIGNWARE_H */ |