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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2018-12-16 21:19:24 -0800 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-08 16:28:48 +0100 |
| commit | bd62f82f684de5993c35b25631c2dc685b8f4f13 (patch) | |
| tree | c51e47a520fc344b486707eefd18809a89f855f8 /drivers/pci | |
| parent | 532e6db3513da20ae77b81f22c5e07b25965ee60 (diff) | |
| download | barebox-bd62f82f684de5993c35b25631c2dc685b8f4f13.tar.gz barebox-bd62f82f684de5993c35b25631c2dc685b8f4f13.tar.xz | |
PCI: dwc: Small computation improvement
Port of a Linux commit 6995de2168edc6e58a350e7eb76e02dd191b64f4
Replace a division by 2 operation for a right shift rotation of 1 bit.
Probably any recent and decent compiler does this kind of substitution
in order to improve code performance. Nevertheless it's a coding good
practice whenever there is a division / multiplication by multiple of 2
to replace it by the equivalent operation in this case, the shift
rotation.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pcie-designware-host.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/pcie-designware-host.c b/drivers/pci/pcie-designware-host.c index 7af5a65615..6cc4b93a31 100644 --- a/drivers/pci/pcie-designware-host.c +++ b/drivers/pci/pcie-designware-host.c @@ -88,8 +88,8 @@ int __init dw_pcie_host_init(struct pcie_port *pp) cfg_res = dev_get_resource_by_name(dev, IORESOURCE_MEM, "config"); if (cfg_res) { - pp->cfg0_size = resource_size(cfg_res) / 2; - pp->cfg1_size = resource_size(cfg_res) / 2; + pp->cfg0_size = resource_size(cfg_res) >> 1; + pp->cfg1_size = resource_size(cfg_res) >> 1; pp->cfg0_base = cfg_res->start; pp->cfg1_base = cfg_res->start + pp->cfg0_size; @@ -136,8 +136,8 @@ int __init dw_pcie_host_init(struct pcie_port *pp) } if (restype == 0) { of_pci_range_to_resource(&range, np, &pp->cfg); - pp->cfg0_size = resource_size(&pp->cfg) / 2; - pp->cfg1_size = resource_size(&pp->cfg) / 2; + pp->cfg0_size = resource_size(&pp->cfg) >> 1; + pp->cfg1_size = resource_size(&pp->cfg) >> 1; pp->cfg0_base = pp->cfg.start; pp->cfg1_base = pp->cfg.start + pp->cfg0_size; |