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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-02-01 08:19:43 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-02-06 11:51:20 +0100 |
commit | ad200f0dc31c1dc89e36e0d2f71707c51e2bc0a1 (patch) | |
tree | 96dbbbfc78a0e1085b6944518c9c90d82fe7ca7f /drivers/pinctrl | |
parent | c82e1f90d2fa1ebfbeaf0f765ee974b31d273b1c (diff) | |
download | barebox-ad200f0dc31c1dc89e36e0d2f71707c51e2bc0a1.tar.gz barebox-ad200f0dc31c1dc89e36e0d2f71707c51e2bc0a1.tar.xz |
pinctrl: i.MX7: Fix LPSR sel_imput setting
The i.MX7 has two pinmux controllers, the regular and the LPSR
controller. The LPSR pinmux controller doesn't have any sel_input
registers, instead they can be found in the regular pinmux controller.
This means whenever we want to apply the the sel_input setting for
the LPSR controller, we have to apply them to the regular controller
instead.
In barebox take the easy way out and just add the difference of the
two base addresses to the register offset. The same issue is present
in the Kernel aswell, but when the bootloader already configured
the pins correctly nobody notices when the Kernel sel_input setup
effectively is a no-op.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/imx-iomux-v3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index dea4324643..50d7177367 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -177,7 +177,7 @@ static int imx_iomux_v3_probe(struct device_d *dev) } static struct imx_iomux_v3_data imx_iomux_imx7_lpsr_data = { - .flags = ZERO_OFFSET_VALID, + .flags = ZERO_OFFSET_VALID | IMX7_PINMUX_LPSR, }; static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = { |