serial: ns16550: add $global.bootm.earlycon fixup support

There are too many ways to integrate a ns16550. Let barebox compute a
suitable earlycon for each device.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220523092526.791716-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 21 insertions, 0 deletions

diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
index f93a89ab95..0d67ec4358 100644
--- a/drivers/serial/serial_ns16550.c
+++ b/drivers/serial/serial_ns16550.c
@@ -39,11 +39,13 @@ struct ns16550_priv {
 	unsigned iobase;
 	void (*write_reg)(struct ns16550_priv *, uint8_t val, unsigned offset);
 	uint8_t (*read_reg)(struct ns16550_priv *, unsigned offset);
+	const char *access_type;
 };
 
 struct ns16550_drvdata {
         void (*init_port)(struct console_device *cdev);
         const char *linux_console_name;
+        const char *linux_earlycon_name;
 };
 
 static inline struct ns16550_priv *to_ns16550_priv(struct console_device *cdev)
@@ -323,22 +325,27 @@ static void ns16550_probe_dt(struct device_d *dev, struct ns16550_priv *priv)
 		priv->mmiobase += offset;
 	of_property_read_u32(np, "reg-shift", &priv->plat.shift);
 	of_property_read_u32(np, "reg-io-width", &width);
+
 	switch (width) {
 	case 1:
 		priv->read_reg = ns16550_read_reg_mmio_8;
 		priv->write_reg = ns16550_write_reg_mmio_8;
+		priv->access_type = "mmio";
 		break;
 	case 2:
 		priv->read_reg = ns16550_read_reg_mmio_16;
 		priv->write_reg = ns16550_write_reg_mmio_16;
+		priv->access_type = "mmio16";
 		break;
 	case 4:
 		if (of_device_is_big_endian(np)) {
 			priv->read_reg = ns16550_read_reg_mmio_32be;
 			priv->write_reg = ns16550_write_reg_mmio_32be;
+			priv->access_type = "mmio32be";
 		} else {
 			priv->read_reg = ns16550_read_reg_mmio_32;
 			priv->write_reg = ns16550_write_reg_mmio_32;
+			priv->access_type = "mmio32";
 		}
 		break;
 	default:
@@ -350,25 +357,30 @@ static void ns16550_probe_dt(struct device_d *dev, struct ns16550_priv *priv)
 static struct ns16550_drvdata ns16450_drvdata = {
 	.init_port = ns16450_serial_init_port,
 	.linux_console_name = "ttyS",
+	.linux_earlycon_name = "uart8250",
 };
 
 static struct ns16550_drvdata ns16550_drvdata = {
 	.init_port = ns16550_serial_init_port,
 	.linux_console_name = "ttyS",
+	.linux_earlycon_name = "uart8250",
 };
 
 static __maybe_unused struct ns16550_drvdata omap_drvdata = {
 	.init_port = ns16550_omap_init_port,
 	.linux_console_name = "ttyO",
+	.linux_earlycon_name = "omap8250",
 };
 
 static __maybe_unused struct ns16550_drvdata jz_drvdata = {
 	.init_port = ns16550_jz_init_port,
+	.linux_earlycon_name = "jz4740_uart",
 };
 
 static __maybe_unused struct ns16550_drvdata rpi_drvdata = {
 	.init_port = rpi_init_port,
 	.linux_console_name = "ttyS",
+	.linux_earlycon_name = "bcm2835aux",
 };
 
 static int ns16550_init_iomem(struct device_d *dev, struct ns16550_priv *priv)
@@ -391,14 +403,17 @@ static int ns16550_init_iomem(struct device_d *dev, struct ns16550_priv *priv)
 	case IORESOURCE_MEM_8BIT:
 		priv->read_reg = ns16550_read_reg_mmio_8;
 		priv->write_reg = ns16550_write_reg_mmio_8;
+		priv->access_type = "mmio";
 		break;
 	case IORESOURCE_MEM_16BIT:
 		priv->read_reg = ns16550_read_reg_mmio_16;
 		priv->write_reg = ns16550_write_reg_mmio_16;
+		priv->access_type = "mmio16";
 		break;
 	case IORESOURCE_MEM_32BIT:
 		priv->read_reg = ns16550_read_reg_mmio_32;
 		priv->write_reg = ns16550_write_reg_mmio_32;
+		priv->access_type = "mmio32";
 		break;
 	}
 
@@ -436,6 +451,8 @@ static int ns16550_init_ioport(struct device_d *dev, struct ns16550_priv *priv)
 		break;
 	}
 
+	priv->access_type = "io";
+
 	return 0;
 }
 
@@ -497,6 +514,10 @@ static int ns16550_probe(struct device_d *dev)
 	cdev->setbrg = ns16550_setbaudrate;
 	cdev->flush = ns16550_flush;
 	cdev->linux_console_name = devtype->linux_console_name;
+	cdev->linux_earlycon_name = basprintf("%s,%s", devtype->linux_earlycon_name,
+					      priv->access_type);
+	cdev->phys_base = !strcmp(priv->access_type, "io") ?
+		IOMEM((ulong)priv->iobase) : priv->mmiobase;
 
 	priv->fcrval = FCRVAL;