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author | Sascha Hauer <s.hauer@pengutronix.de> | 2007-07-05 18:01:58 +0200 |
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committer | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-07-05 18:01:58 +0200 |
commit | 12eb42a6f922acedf8b48ac44a1140238ae29db2 (patch) | |
tree | e089ee3ca7a4f6a077c14ccf6f3155f036020aba /drivers/serial | |
parent | de9740e6a62dc0294fc1563090f0b34d99ac576a (diff) | |
download | barebox-12eb42a6f922acedf8b48ac44a1140238ae29db2.tar.gz barebox-12eb42a6f922acedf8b48ac44a1140238ae29db2.tar.xz |
svn_rev_485
serial driver cleanup
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 6 | ||||
-rw-r--r-- | drivers/serial/Makefile | 2 | ||||
-rw-r--r-- | drivers/serial/serial.c | 326 | ||||
-rw-r--r-- | drivers/serial/serial_pl011.h | 137 |
4 files changed, 142 insertions, 329 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index e7738b1db0..672773cc2f 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -1,6 +1,8 @@ menu "serial drivers" -config DRIVER_SERIAL_DUMMY - bool "dummy entry" +config DRIVER_SERIAL_IMX + depends on ARCH_IMX + default y + bool "i.MX serial driver" endmenu diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 50b562f6b0..1a8d887d73 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -1,8 +1,8 @@ # atmel_usart.o # ns9750_serial.o # s3c4510b_uart.o -obj-y += serial.o # serial_max3100.o # serial_pl010.o # serial_pl011.o # serial_xuartlite.o +obj-$(CONFIG_DRIVER_SERIAL_IMX) += serial_imx.o diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c deleted file mode 100644 index 76425d8790..0000000000 --- a/drivers/serial/serial.c +++ /dev/null @@ -1,326 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#ifdef CFG_NS16550_SERIAL - -#include <ns16550.h> -#ifdef CFG_NS87308 -#include <ns87308.h> -#endif - -#if defined (CONFIG_SERIAL_MULTI) -#include <serial.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#if !defined(CONFIG_CONS_INDEX) -#if defined (CONFIG_SERIAL_MULTI) -/* with CONFIG_SERIAL_MULTI we might have no console - * on these devices - */ -#else -#error "No console index specified." -#endif /* CONFIG_SERIAL_MULTI */ -#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4) -#error "Invalid console index value." -#endif - -#if CONFIG_CONS_INDEX == 1 && !defined(CFG_NS16550_COM1) -#error "Console port 1 defined but not configured." -#elif CONFIG_CONS_INDEX == 2 && !defined(CFG_NS16550_COM2) -#error "Console port 2 defined but not configured." -#elif CONFIG_CONS_INDEX == 3 && !defined(CFG_NS16550_COM3) -#error "Console port 3 defined but not configured." -#elif CONFIG_CONS_INDEX == 4 && !defined(CFG_NS16550_COM4) -#error "Console port 4 defined but not configured." -#endif - -/* Note: The port number specified in the functions is 1 based. - * the array is 0 based. - */ -static NS16550_t serial_ports[4] = { -#ifdef CFG_NS16550_COM1 - (NS16550_t)CFG_NS16550_COM1, -#else - NULL, -#endif -#ifdef CFG_NS16550_COM2 - (NS16550_t)CFG_NS16550_COM2, -#else - NULL, -#endif -#ifdef CFG_NS16550_COM3 - (NS16550_t)CFG_NS16550_COM3, -#else - NULL, -#endif -#ifdef CFG_NS16550_COM4 - (NS16550_t)CFG_NS16550_COM4 -#else - NULL -#endif -}; - -#define PORT serial_ports[port-1] -#if defined(CONFIG_CONS_INDEX) -#define CONSOLE (serial_ports[CONFIG_CONS_INDEX-1]) -#endif - -#if defined(CONFIG_SERIAL_MULTI) - -/* Multi serial device functions */ -#define DECLARE_ESERIAL_FUNCTIONS(port) \ - int eserial##port##_init (void) {\ - int clock_divisor; \ - clock_divisor = calc_divisor(serial_ports[port-1]); \ - NS16550_init(serial_ports[port-1], clock_divisor); \ - return(0);}\ - void eserial##port##_setbrg (void) {\ - serial_setbrg_dev(port);}\ - int eserial##port##_getc (void) {\ - return serial_getc_dev(port);}\ - int eserial##port##_tstc (void) {\ - return serial_tstc_dev(port);}\ - void eserial##port##_putc (const char c) {\ - serial_putc_dev(port, c);}\ - void eserial##port##_puts (const char *s) {\ - serial_puts_dev(port, s);} - -/* Serial device descriptor */ -#define INIT_ESERIAL_STRUCTURE(port,name,bus) {\ - name,\ - bus,\ - eserial##port##_init,\ - eserial##port##_setbrg,\ - eserial##port##_getc,\ - eserial##port##_tstc,\ - eserial##port##_putc,\ - eserial##port##_puts, } - -#endif /* CONFIG_SERIAL_MULTI */ - -static int calc_divisor (NS16550_t port) -{ -#ifdef CONFIG_OMAP1510 - /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { - port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ - return (1); /* return 1 for base divisor */ - } - port->osc_12m_sel = 0; /* clear if previsouly set */ -#endif -#ifdef CONFIG_OMAP1610 - /* If can't cleanly clock 115200 set div to 1 */ - if ((CFG_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) { - return (26); /* return 26 for base divisor */ - } -#endif - -#ifdef CONFIG_APTIX -#define MODE_X_DIV 13 -#else -#define MODE_X_DIV 16 -#endif - return (CFG_NS16550_CLK / MODE_X_DIV / gd->baudrate); - -} - -#if !defined(CONFIG_SERIAL_MULTI) -int serial_init (void) -{ - int clock_divisor; - -#ifdef CFG_NS87308 - initialise_ns87308(); -#endif - -#ifdef CFG_NS16550_COM1 - clock_divisor = calc_divisor(serial_ports[0]); - NS16550_init(serial_ports[0], clock_divisor); -#endif -#ifdef CFG_NS16550_COM2 - clock_divisor = calc_divisor(serial_ports[1]); - NS16550_init(serial_ports[1], clock_divisor); -#endif -#ifdef CFG_NS16550_COM3 - clock_divisor = calc_divisor(serial_ports[2]); - NS16550_init(serial_ports[2], clock_divisor); -#endif -#ifdef CFG_NS16550_COM4 - clock_divisor = calc_divisor(serial_ports[3]); - NS16550_init(serial_ports[3], clock_divisor); -#endif - - return (0); -} -#endif - -void -_serial_putc(const char c,const int port) -{ - if (c == '\n') - NS16550_putc(PORT, '\r'); - - NS16550_putc(PORT, c); -} - -void -_serial_putc_raw(const char c,const int port) -{ - NS16550_putc(PORT, c); -} - -void -_serial_puts (const char *s,const int port) -{ - while (*s) { - _serial_putc (*s++,port); - } -} - - -int -_serial_getc(const int port) -{ - return NS16550_getc(PORT); -} - -int -_serial_tstc(const int port) -{ - return NS16550_tstc(PORT); -} - -void -_serial_setbrg (const int port) -{ - int clock_divisor; - - clock_divisor = calc_divisor(PORT); - NS16550_reinit(PORT, clock_divisor); -} - -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_putc_dev(unsigned int dev_index,const char c) -{ - _serial_putc(c,dev_index); -} -#else -void -serial_putc(const char c) -{ - _serial_putc(c,CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_putc_raw_dev(unsigned int dev_index,const char c) -{ - _serial_putc_raw(c,dev_index); -} -#else -void -serial_putc_raw(const char c) -{ - _serial_putc_raw(c,CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_puts_dev(unsigned int dev_index,const char *s) -{ - _serial_puts(s,dev_index); -} -#else -void -serial_puts(const char *s) -{ - _serial_puts(s,CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -static inline int -serial_getc_dev(unsigned int dev_index) -{ - return _serial_getc(dev_index); -} -#else -int -serial_getc(void) -{ - return _serial_getc(CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -static inline int -serial_tstc_dev(unsigned int dev_index) -{ - return _serial_tstc(dev_index); -} -#else -int -serial_tstc(void) -{ - return _serial_tstc(CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) -static inline void -serial_setbrg_dev(unsigned int dev_index) -{ - _serial_setbrg(dev_index); -} -#else -void -serial_setbrg(void) -{ - _serial_setbrg(CONFIG_CONS_INDEX); -} -#endif - -#if defined(CONFIG_SERIAL_MULTI) - -DECLARE_ESERIAL_FUNCTIONS(1); -struct serial_device eserial1_device = - INIT_ESERIAL_STRUCTURE(1,"eserial0","EUART1"); -DECLARE_ESERIAL_FUNCTIONS(2); -struct serial_device eserial2_device = - INIT_ESERIAL_STRUCTURE(2,"eserial1","EUART2"); -DECLARE_ESERIAL_FUNCTIONS(3); -struct serial_device eserial3_device = - INIT_ESERIAL_STRUCTURE(3,"eserial2","EUART3"); -DECLARE_ESERIAL_FUNCTIONS(4); -struct serial_device eserial4_device = - INIT_ESERIAL_STRUCTURE(4,"eserial3","EUART4"); -#endif /* CONFIG_SERIAL_MULTI */ - -#endif diff --git a/drivers/serial/serial_pl011.h b/drivers/serial/serial_pl011.h new file mode 100644 index 0000000000..5f20fdd108 --- /dev/null +++ b/drivers/serial/serial_pl011.h @@ -0,0 +1,137 @@ +/* + * (C) Copyright 2003, 2004 + * ARM Ltd. + * Philippe Robin, <philippe.robin@arm.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * ARM PrimeCell UART's (PL010 & PL011) + * ------------------------------------ + * + * Definitions common to both PL010 & PL011 + * + */ +#define UART_PL01x_DR 0x00 /* Data read or written from the interface. */ +#define UART_PL01x_RSR 0x04 /* Receive status register (Read). */ +#define UART_PL01x_ECR 0x04 /* Error clear register (Write). */ +#define UART_PL01x_FR 0x18 /* Flag register (Read only). */ + +#define UART_PL01x_RSR_OE 0x08 +#define UART_PL01x_RSR_BE 0x04 +#define UART_PL01x_RSR_PE 0x02 +#define UART_PL01x_RSR_FE 0x01 + +#define UART_PL01x_FR_TXFE 0x80 +#define UART_PL01x_FR_RXFF 0x40 +#define UART_PL01x_FR_TXFF 0x20 +#define UART_PL01x_FR_RXFE 0x10 +#define UART_PL01x_FR_BUSY 0x08 +#define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY) + +/* + * PL010 definitions + * + */ +#define UART_PL010_LCRH 0x08 /* Line control register, high byte. */ +#define UART_PL010_LCRM 0x0C /* Line control register, middle byte. */ +#define UART_PL010_LCRL 0x10 /* Line control register, low byte. */ +#define UART_PL010_CR 0x14 /* Control register. */ +#define UART_PL010_IIR 0x1C /* Interrupt indentification register (Read). */ +#define UART_PL010_ICR 0x1C /* Interrupt clear register (Write). */ +#define UART_PL010_ILPR 0x20 /* IrDA low power counter register. */ + +#define UART_PL010_CR_LPE (1 << 7) +#define UART_PL010_CR_RTIE (1 << 6) +#define UART_PL010_CR_TIE (1 << 5) +#define UART_PL010_CR_RIE (1 << 4) +#define UART_PL010_CR_MSIE (1 << 3) +#define UART_PL010_CR_IIRLP (1 << 2) +#define UART_PL010_CR_SIREN (1 << 1) +#define UART_PL010_CR_UARTEN (1 << 0) + +#define UART_PL010_LCRH_WLEN_8 (3 << 5) +#define UART_PL010_LCRH_WLEN_7 (2 << 5) +#define UART_PL010_LCRH_WLEN_6 (1 << 5) +#define UART_PL010_LCRH_WLEN_5 (0 << 5) +#define UART_PL010_LCRH_FEN (1 << 4) +#define UART_PL010_LCRH_STP2 (1 << 3) +#define UART_PL010_LCRH_EPS (1 << 2) +#define UART_PL010_LCRH_PEN (1 << 1) +#define UART_PL010_LCRH_BRK (1 << 0) + + +#define UART_PL010_BAUD_460800 1 +#define UART_PL010_BAUD_230400 3 +#define UART_PL010_BAUD_115200 7 +#define UART_PL010_BAUD_57600 15 +#define UART_PL010_BAUD_38400 23 +#define UART_PL010_BAUD_19200 47 +#define UART_PL010_BAUD_14400 63 +#define UART_PL010_BAUD_9600 95 +#define UART_PL010_BAUD_4800 191 +#define UART_PL010_BAUD_2400 383 +#define UART_PL010_BAUD_1200 767 +/* + * PL011 definitions + * + */ +#define UART_PL011_IBRD 0x24 +#define UART_PL011_FBRD 0x28 +#define UART_PL011_LCRH 0x2C +#define UART_PL011_CR 0x30 +#define UART_PL011_IMSC 0x38 +#define UART_PL011_PERIPH_ID0 0xFE0 + +#define UART_PL011_LCRH_SPS (1 << 7) +#define UART_PL011_LCRH_WLEN_8 (3 << 5) +#define UART_PL011_LCRH_WLEN_7 (2 << 5) +#define UART_PL011_LCRH_WLEN_6 (1 << 5) +#define UART_PL011_LCRH_WLEN_5 (0 << 5) +#define UART_PL011_LCRH_FEN (1 << 4) +#define UART_PL011_LCRH_STP2 (1 << 3) +#define UART_PL011_LCRH_EPS (1 << 2) +#define UART_PL011_LCRH_PEN (1 << 1) +#define UART_PL011_LCRH_BRK (1 << 0) + +#define UART_PL011_CR_CTSEN (1 << 15) +#define UART_PL011_CR_RTSEN (1 << 14) +#define UART_PL011_CR_OUT2 (1 << 13) +#define UART_PL011_CR_OUT1 (1 << 12) +#define UART_PL011_CR_RTS (1 << 11) +#define UART_PL011_CR_DTR (1 << 10) +#define UART_PL011_CR_RXE (1 << 9) +#define UART_PL011_CR_TXE (1 << 8) +#define UART_PL011_CR_LPE (1 << 7) +#define UART_PL011_CR_IIRLP (1 << 2) +#define UART_PL011_CR_SIREN (1 << 1) +#define UART_PL011_CR_UARTEN (1 << 0) + +#define UART_PL011_IMSC_OEIM (1 << 10) +#define UART_PL011_IMSC_BEIM (1 << 9) +#define UART_PL011_IMSC_PEIM (1 << 8) +#define UART_PL011_IMSC_FEIM (1 << 7) +#define UART_PL011_IMSC_RTIM (1 << 6) +#define UART_PL011_IMSC_TXIM (1 << 5) +#define UART_PL011_IMSC_RXIM (1 << 4) +#define UART_PL011_IMSC_DSRMIM (1 << 3) +#define UART_PL011_IMSC_DCDMIM (1 << 2) +#define UART_PL011_IMSC_CTSMIM (1 << 1) +#define UART_PL011_IMSC_RIMIM (1 << 0) |