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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2024-01-19 23:45:22 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2024-01-22 10:31:43 +0100 |
| commit | aaea50bbcde2e66f3ef6c15cf825ebabb8dc0e6a (patch) | |
| tree | 40ecc69b6ca7d48ac6be069448eda911f06fdf88 /drivers/soc/imx | |
| parent | 897ca1a97280cde1101f9be2fff29b6a5356bc14 (diff) | |
| download | barebox-aaea50bbcde2e66f3ef6c15cf825ebabb8dc0e6a.tar.gz barebox-aaea50bbcde2e66f3ef6c15cf825ebabb8dc0e6a.tar.xz | |
soc: imx: featctrl: finalize support for i.MX8MP
We only had preliminary feature controller support for i.MX8MP and
support for detecting missing VPU, DSP, NPU, LVDS and CPUs was missing.
Add support for them, so barebox may fix up the kernel device tree to
disable these nodes. This is especially important for the VPU and NPU as
the kernel's blk-ctrl power domain driver may try to power them down as
they are unused, which would make the SoC hang.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240119224522.1399213-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/soc/imx')
| -rw-r--r-- | drivers/soc/imx/imx8m-featctrl.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/soc/imx/imx8m-featctrl.c b/drivers/soc/imx/imx8m-featctrl.c index 23a3f99016..31579aff7e 100644 --- a/drivers/soc/imx/imx8m-featctrl.c +++ b/drivers/soc/imx/imx8m-featctrl.c @@ -46,7 +46,7 @@ static void check_cpus(u32 mask, u32 reg, unsigned long *features) } } -int imx8m_feat_ctrl_init(struct device *dev, u32 tester4, +int imx8m_feat_ctrl_init(struct device *dev, u32 tester3, u32 tester4, const struct imx8m_featctrl_data *data) { unsigned long *features; @@ -55,14 +55,15 @@ int imx8m_feat_ctrl_init(struct device *dev, u32 tester4, if (!dev || !data) return -ENODEV; - dev_dbg(dev, "tester4 = 0x%08x\n", tester4); + dev_dbg(dev, "tester3 = 0x%08x, tester4 = 0x%08x\n", tester3, tester4); priv = xzalloc(sizeof(*priv)); features = priv->features; bitmap_fill(features, IMX8M_FEAT_END); - if (is_fused(tester4, data->tester4.vpu_bitmask)) + if (is_fused(tester3, data->tester3.vpu_bitmask) || + is_fused(tester4, data->tester4.vpu_bitmask)) clear_bit(IMX8M_FEAT_VPU, features); if (is_fused(tester4, data->tester4.gpu_bitmask)) clear_bit(IMX8M_FEAT_GPU, features); @@ -70,8 +71,16 @@ int imx8m_feat_ctrl_init(struct device *dev, u32 tester4, clear_bit(IMX8M_FEAT_MIPI_DSI, features); if (is_fused(tester4, data->tester4.isp_bitmask)) clear_bit(IMX8M_FEAT_ISP, features); - - if (data->tester4.cpu_bitmask) + if (is_fused(tester4, data->tester4.npu_bitmask)) + clear_bit(IMX8M_FEAT_NPU, features); + if (is_fused(tester4, data->tester4.lvds_bitmask)) + clear_bit(IMX8M_FEAT_LVDS, features); + if (is_fused(tester4, data->tester4.dsp_bitmask)) + clear_bit(IMX8M_FEAT_DSP, features); + + if (data->tester3.cpu_bitmask) + check_cpus(data->tester3.cpu_bitmask, tester3, features); + else if (data->tester4.cpu_bitmask) check_cpus(data->tester4.cpu_bitmask, tester4, features); priv->feat.dev = dev; |