summaryrefslogtreecommitdiffstats
path: root/drivers/spi
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2008-03-14 12:59:55 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2008-03-14 12:59:55 +0100
commita14a5c02f0063e0cf7aae85aace499a080b790c1 (patch)
tree8fdd107ec20cc9093c12d2baa85b054b14ff1d01 /drivers/spi
parent906eea397a2f4378c4cab841fb832211e0414ce9 (diff)
downloadbarebox-a14a5c02f0063e0cf7aae85aace499a080b790c1.tar.gz
barebox-a14a5c02f0063e0cf7aae85aace499a080b790c1.tar.xz
first (partly) running spi support
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/imx_spi.c154
-rw-r--r--drivers/spi/mc13783.c200
-rw-r--r--drivers/spi/spi.c191
3 files changed, 536 insertions, 9 deletions
diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c
index 641e635e29..1410f355d8 100644
--- a/drivers/spi/imx_spi.c
+++ b/drivers/spi/imx_spi.c
@@ -1,14 +1,162 @@
+/*
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
#include <common.h>
#include <init.h>
#include <driver.h>
#include <spi/spi.h>
#include <xfuncs.h>
+#include <asm/io.h>
+
+#define MXC_CSPIRXDATA 0x00
+#define MXC_CSPITXDATA 0x04
+#define MXC_CSPICTRL 0x08
+#define MXC_CSPIINT 0x0C
+#define MXC_CSPIDMA 0x18
+#define MXC_CSPISTAT 0x0C
+#define MXC_CSPIPERIOD 0x14
+#define MXC_CSPITEST 0x10
+#define MXC_CSPIRESET 0x1C
+
+#define MXC_CSPICTRL_ENABLE (1 << 10)
+#define MXC_CSPICTRL_MASTER (1 << 11)
+#define MXC_CSPICTRL_XCH (1 << 9)
+#define MXC_CSPICTRL_LOWPOL (1 << 5)
+#define MXC_CSPICTRL_PHA (1 << 6)
+#define MXC_CSPICTRL_SSCTL (1 << 7)
+#define MXC_CSPICTRL_HIGHSSPOL (1 << 8)
+#define MXC_CSPICTRL_CS(x) (((x) & 0x3) << 19)
+#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0x1f) << 0)
+#define MXC_CSPICTRL_DATARATE(x) (((x) & 0x7) << 14)
+
+#define MXC_CSPICTRL_MAXDATRATE 0x10
+#define MXC_CSPICTRL_DATAMASK 0x1F
+#define MXC_CSPICTRL_DATASHIFT 14
+
+#define MXC_CSPISTAT_TE (1 << 0)
+#define MXC_CSPISTAT_TH (1 << 1)
+#define MXC_CSPISTAT_TF (1 << 2)
+#define MXC_CSPISTAT_RR (1 << 3)
+#define MXC_CSPISTAT_RH (1 << 4)
+#define MXC_CSPISTAT_RF (1 << 5)
+#define MXC_CSPISTAT_RO (1 << 6)
+#define MXC_CSPISTAT_TC_0_7 (1 << 7)
+#define MXC_CSPISTAT_TC_0_5 (1 << 8)
+#define MXC_CSPISTAT_TC_0_4 (1 << 8)
+#define MXC_CSPISTAT_TC_0_0 (1 << 3)
+#define MXC_CSPISTAT_BO_0_7 0
+#define MXC_CSPISTAT_BO_0_5 (1 << 7)
+#define MXC_CSPISTAT_BO_0_4 (1 << 7)
+#define MXC_CSPISTAT_BO_0_0 (1 << 8)
+
+#define MXC_CSPIPERIOD_32KHZ (1 << 15)
+
+#define MXC_CSPITEST_LBC (1 << 14)
+
+static int imx_spi_setup(struct spi_device *spi)
+{
+ debug("%s mode 0x%08x bits_per_word: %d speed: %d\n",
+ __FUNCTION__, spi->mode, spi->bits_per_word,
+ spi->max_speed_hz);
+ return 0;
+}
+
+unsigned int spi_xchg_single(ulong base, unsigned int data)
+{
+
+ unsigned int cfg_reg = readl(base + MXC_CSPICTRL);
+
+ writel(data, base + MXC_CSPITXDATA);
+
+ cfg_reg |= MXC_CSPICTRL_XCH;
+
+ writel(cfg_reg, base + MXC_CSPICTRL);
+
+ while (readl(base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH);
+
+ return readl(base + MXC_CSPIRXDATA);
+}
+
+static void mxc_spi_chipselect(struct spi_device *spi, int is_active)
+{
+ struct spi_master *master = spi->master;
+ ulong base = master->dev->map_base;
+ u32 ctrl_reg;
+
+ ctrl_reg = MXC_CSPICTRL_CS(spi->chip_select)
+ | MXC_CSPICTRL_BITCOUNT(spi->bits_per_word - 1)
+ | MXC_CSPICTRL_DATARATE(7) /* FIXME: calculate data rate */
+ | MXC_CSPICTRL_ENABLE
+ | MXC_CSPICTRL_MASTER;
+
+ if (spi->mode & SPI_CPHA)
+ ctrl_reg |= MXC_CSPICTRL_PHA;
+ if (!(spi->mode & SPI_CPOL))
+ ctrl_reg |= MXC_CSPICTRL_LOWPOL;
+ if (spi->mode & SPI_CS_HIGH)
+ ctrl_reg |= MXC_CSPICTRL_HIGHSSPOL;
+
+ writel(ctrl_reg, base + MXC_CSPICTRL);
+}
+
+static int imx_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
+{
+ struct spi_master *master = spi->master;
+ ulong base = master->dev->map_base;
+ struct spi_transfer *t = NULL;
+
+ mxc_spi_chipselect(spi, 1);
+
+ list_for_each_entry (t, &mesg->transfers, transfer_list) {
+ const u32 *txbuf = t->tx_buf;
+ u32 *rxbuf = t->rx_buf;
+ int i = 0;
+
+ while(i < t->len >> 2) {
+ rxbuf[i] = spi_xchg_single(base, txbuf[i]);
+ i++;
+ }
+ }
+ return 0;
+}
static int imx_spi_probe(struct device_d *dev)
{
struct spi_master *master;
- master = xmalloc(sizeof(struct spi_master));
+ debug("%s\n", __FUNCTION__);
+
+ master = xzalloc(sizeof(struct spi_master));
+ debug("master: %p %d\n", master, sizeof(struct spi_master));
+
+ master->dev = dev;
+
+ master->setup = imx_spi_setup;
+ master->transfer = imx_spi_transfer;
+ master->num_chipselect = 1; /* FIXME: Board dependent */
+
+ writel(MXC_CSPICTRL_ENABLE | MXC_CSPICTRL_MASTER,
+ dev->map_base + MXC_CSPICTRL);
+ writel(MXC_CSPIPERIOD_32KHZ,
+ dev->map_base + MXC_CSPIPERIOD);
+ writel(0, dev->map_base + MXC_CSPIINT);
spi_register_master(master);
@@ -22,8 +170,8 @@ static struct driver_d imx_spi_driver = {
static int imx_spi_init(void)
{
- register_driver(&imx_spi_driver);
- return 0;
+ register_driver(&imx_spi_driver);
+ return 0;
}
device_initcall(imx_spi_init);
diff --git a/drivers/spi/mc13783.c b/drivers/spi/mc13783.c
index 6c467dfb93..1d6084c034 100644
--- a/drivers/spi/mc13783.c
+++ b/drivers/spi/mc13783.c
@@ -1,12 +1,207 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
#include <common.h>
#include <init.h>
#include <driver.h>
#include <spi/spi.h>
#include <xfuncs.h>
+#include <errno.h>
+#include <asm/arch/pmic.h>
+
+#define REG_INTERRUPT_STATUS_0 0x0
+#define REG_INTERRUPT_MASK 0x1
+#define REG_INTERRUPT_SENSE_0 0x2
+#define REG_INTERRUPT_STATUS_1 0x3
+#define REG_INTERRUPT_MASK_1 0x4
+#define REG_INTERRUPT_SENSE_1 0x5
+#define REG_POWER_UP_MODE_SENSE 0x6
+#define REG_REVISION 0x7
+#define REG_SEMAPHORE 0x8
+#define REG_ARBITRATION_PERIPHERAL_AUDIO 0x9
+#define REG_ARBITRATION_SWITCHERS 0xa
+#define REG_ARBITRATION_REGULATORS(x) (0xb + (x)) /* 0 .. 1 */
+#define REG_POWER_CONTROL(x) (0xd + (x)) /* 0 .. 2 */
+#define REG_REGEN_ASSIGNMENT 0x10
+#define REG_CONTROL_SPARE 0x11
+#define REG_MEMORY_A 0x12
+#define REG_MEMORY_B 0x13
+#define REG_RTC_TIME 0x14
+#define REG_RTC_ALARM 0x15
+#define REG_RTC_DAY 0x16
+#define REG_RTC_DAY_ALARM 0x17
+#define REG_SWITCHERS(x) (0x18 + (x)) /* 0 .. 5 */
+#define REG_REGULATOR_SETTING(x) (0x1e + (x)) /* 0 .. 1 */
+#define REG_REGULATOR_MODE(x) (0x20 + (x)) /* 0 .. 1 */
+#define REG_POWER_MISCELLANEOUS 0x22
+#define REG_POWER_SPARE 0x23
+#define REG_AUDIO_RX_0 0x24
+#define REG_AUDIO_RX_1 0x25
+#define REG_AUDIO_TX 0x26
+#define REG_AUDIO_SSI_NETWORK 0x27
+#define REG_AUDIO_CODEC 0x28
+#define REG_AUDIO_STEREO_DAC 0x29
+#define REG_AUDIO_SPARE 0x2a
+#define REG_ADC(x) (0x2b + (x)) /* 0 .. 4 */
+#define REG_CHARGER 0x30
+#define REG_USB 0x31
+#define REG_CHARGE_USB_SPARE 0x32
+#define REG_LED_CONTROL(x) (0x33 + (x)) /* 0 .. 5 */
+#define REG_SPARE 0x39
+#define REG_TRIM(x) (0x3a + (x)) /* 0 .. 1 */
+#define REG_TEST(x) (0x3c + (x)) /* 0 .. 3 */
+
+struct spi_device *pmic_spi;
+
+#define MXC_PMIC_REG_NUM(reg) (((reg) & 0x3f) << 25)
+#define MXC_PMIC_WRITE (1 << 31)
+
+#define SWX_VOLTAGE(x) ((x) & 0x3f)
+#define SWX_VOLTAGE_DVS(x) (((x) & 0x3f) << 6)
+#define SWX_VOLTAGE_STANDBY(x) (((x) & 0x3f) << 12)
+#define SWX_VOLTAGE_1_450 0x16
+
+#define SWX_MODE_OFF 0
+#define SWX_MODE_NO_PULSE_SKIP 1
+#define SWX_MODE_PULSE_SKIP 2
+#define SWX_MODE_LOW_POWER_PFM 3
+
+#define SW1A_MODE(x) (((x) & 0x3) << 0)
+#define SW1A_MODE_STANDBY(x) (((x) & 0x3) << 2)
+#define SW1B_MODE(x) (((x) & 0x3) << 10)
+#define SW1B_MODE_STANDBY(x) (((x) & 0x3) << 12)
+#define SW1A_SOFTSTART (1 << 9)
+#define SW1B_SOFTSTART (1 << 17)
+#define SW_PLL_FACTOR(x) (((x) - 28) << 19)
+
+static int spi_rw(struct spi_device *spi, void * buf, size_t len)
+{
+ int ret;
+
+ struct spi_transfer t = {
+ .tx_buf = (const void *)buf,
+ .rx_buf = buf,
+ .len = len,
+ .cs_change = 0,
+ .delay_usecs = 0,
+ };
+ struct spi_message m;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&t, &m);
+ if ((ret = spi_sync(spi, &m)))
+ return ret;
+ return 0;
+}
+
+static uint32_t pmic_read_reg(struct spi_device *spi, int reg)
+{
+ uint32_t buf;
+
+ buf = MXC_PMIC_REG_NUM(reg);
+
+ /* Need to read twice here, as seen in redboot code.
+ * FIXME: Is this a pmic bug or a bug in the spi
+ * controller?
+ */
+ spi_rw(pmic_spi, &buf, 4);
+ spi_rw(pmic_spi, &buf, 4);
+
+ return buf;
+}
+
+static void pmic_write_reg(struct spi_device *spi, int reg, uint32_t val)
+{
+ uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
+
+ spi_rw(pmic_spi, &buf, 4);
+}
+
+int pmic_power(void)
+{
+ if(!pmic_spi) {
+ printf("%s: no pmic device available\n", __FUNCTION__);
+ return -ENODEV;
+ }
+
+ pmic_write_reg(pmic_spi, REG_SWITCHERS(0),
+ SWX_VOLTAGE(SWX_VOLTAGE_1_450) |
+ SWX_VOLTAGE_DVS(SWX_VOLTAGE_1_450) |
+ SWX_VOLTAGE_STANDBY(SWX_VOLTAGE_1_450));
+
+ pmic_write_reg(pmic_spi, REG_SWITCHERS(4),
+ SW1A_MODE(SWX_MODE_NO_PULSE_SKIP) |
+ SW1A_MODE_STANDBY(SWX_MODE_NO_PULSE_SKIP)|
+ SW1A_SOFTSTART |
+ SW1B_MODE(SWX_MODE_NO_PULSE_SKIP) |
+ SW1B_MODE_STANDBY(SWX_MODE_NO_PULSE_SKIP) |
+ SW1B_SOFTSTART |
+ SW_PLL_FACTOR(32)
+ );
+
+ return 0;
+}
+
+ssize_t pmic_read(struct device_d *dev, void *_buf, size_t count, ulong offset, ulong flags)
+{
+ int i = count >> 2;
+ uint32_t *buf = _buf;
+
+ offset >>= 2;
+
+ while (i) {
+ *buf = pmic_read_reg(pmic_spi, offset);
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
+
+ssize_t pmic_write(struct device_d *dev, const void *_buf, size_t count, ulong offset, ulong flags)
+{
+ int i = count >> 2;
+ const uint32_t *buf = _buf;
+
+ offset >>= 2;
+
+ while (i) {
+ pmic_write_reg(pmic_spi, offset, *buf);
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
static int pmic_probe(struct device_d *dev)
{
- printf("%s\n", __FUNCTION__);
+ struct spi_device *spi = (struct spi_device *)dev->type_data;
+
+ dev->size = 256;
+
+ spi->mode = SPI_MODE_2 | SPI_CS_HIGH;
+ spi->bits_per_word = 32;
+ pmic_spi = spi;
return 0;
}
@@ -14,11 +209,12 @@ static int pmic_probe(struct device_d *dev)
static struct driver_d pmic_driver = {
.name = "mc13783",
.probe = pmic_probe,
+ .read = pmic_read,
+ .write = pmic_write,
};
static int pmic_init(void)
{
- printf("%s\n", __FUNCTION__);
register_driver(&pmic_driver);
return 0;
}
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 765e34d5e2..cba12552b6 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1,14 +1,197 @@
+/*
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix
+ *
+ * Derived from Linux SPI Framework
+ *
+ * Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
#include <common.h>
#include <spi/spi.h>
+#include <xfuncs.h>
+#include <malloc.h>
+#include <errno.h>
+
+/* SPI devices should normally not be created by SPI device drivers; that
+ * would make them board-specific. Similarly with SPI master drivers.
+ * Device registration normally goes into like arch/.../mach.../board-YYY.c
+ * with other readonly (flashable) information about mainboard devices.
+ */
+
+struct boardinfo {
+ struct list_head list;
+ unsigned n_board_info;
+ struct spi_board_info board_info[0];
+};
+
+static LIST_HEAD(board_list);
-int spi_register_boardinfo(struct spi_board_info *info, int num)
+/**
+ * spi_new_device - instantiate one new SPI device
+ * @master: Controller to which device is connected
+ * @chip: Describes the SPI device
+ * Context: can sleep
+ *
+ * On typical mainboards, this is purely internal; and it's not needed
+ * after board init creates the hard-wired devices. Some development
+ * platforms may not be able to use spi_register_board_info though, and
+ * this is exported so that for example a USB or parport based adapter
+ * driver could add devices (which it would learn about out-of-band).
+ *
+ * Returns the new device, or NULL.
+ */
+struct spi_device *spi_new_device(struct spi_master *master,
+ struct spi_board_info *chip)
{
- printf("%s\n", __FUNCTION__);
+ struct spi_device *proxy;
+ int status;
+
+ /* Chipselects are numbered 0..max; validate. */
+ if (chip->chip_select >= master->num_chipselect) {
+ debug("cs%d > max %d\n",
+ chip->chip_select,
+ master->num_chipselect);
+ return NULL;
+ }
+
+ proxy = xzalloc(sizeof *proxy);
+ proxy->master = master;
+ proxy->chip_select = chip->chip_select;
+ proxy->max_speed_hz = chip->max_speed_hz;
+ proxy->mode = chip->mode;
+ strcpy(proxy->dev.name, chip->name);
+ strcpy(proxy->dev.id, "pmic");
+ proxy->dev.type_data = proxy;
+ status = register_device(&proxy->dev);
+
+ /* drivers may modify this initial i/o setup */
+ status = master->setup(proxy);
+ if (status < 0) {
+ printf("can't %s %s, status %d\n",
+ "setup", proxy->dev.id, status);
+ goto fail;
+ }
+
+ return proxy;
+
+fail:
+ free(proxy);
+ return NULL;
+}
+EXPORT_SYMBOL(spi_new_device);
+
+/**
+ * spi_register_board_info - register SPI devices for a given board
+ * @info: array of chip descriptors
+ * @n: how many descriptors are provided
+ * Context: can sleep
+ *
+ * Board-specific early init code calls this (probably during arch_initcall)
+ * with segments of the SPI device table. Any device nodes are created later,
+ * after the relevant parent SPI controller (bus_num) is defined. We keep
+ * this table of devices forever, so that reloading a controller driver will
+ * not make Linux forget about these hard-wired devices.
+ *
+ * Other code can also call this, e.g. a particular add-on board might provide
+ * SPI devices through its expansion connector, so code initializing that board
+ * would naturally declare its SPI devices.
+ *
+ * The board info passed can safely be __initdata ... but be careful of
+ * any embedded pointers (platform_data, etc), they're copied as-is.
+ */
+int
+spi_register_board_info(struct spi_board_info const *info, int n)
+{
+ struct boardinfo *bi;
+
+ bi = xmalloc(sizeof(*bi) + n * sizeof *info);
+
+ bi->n_board_info = n;
+ memcpy(bi->board_info, info, n * sizeof *info);
+
+ list_add_tail(&bi->list, &board_list);
+
return 0;
}
+static void scan_boardinfo(struct spi_master *master)
+{
+ struct boardinfo *bi;
+
+ list_for_each_entry(bi, &board_list, list) {
+ struct spi_board_info *chip = bi->board_info;
+ unsigned n;
+
+ for (n = bi->n_board_info; n > 0; n--, chip++) {
+ debug("%s %d %d\n", __FUNCTION__, chip->bus_num, master->bus_num);
+ if (chip->bus_num != master->bus_num)
+ continue;
+ /* NOTE: this relies on spi_new_device to
+ * issue diagnostics when given bogus inputs
+ */
+ (void) spi_new_device(master, chip);
+ }
+ }
+}
+
+/**
+ * spi_register_master - register SPI master controller
+ * @master: initialized master, originally from spi_alloc_master()
+ * Context: can sleep
+ *
+ * SPI master controllers connect to their drivers using some non-SPI bus,
+ * such as the platform bus. The final stage of probe() in that code
+ * includes calling spi_register_master() to hook up to this SPI bus glue.
+ *
+ * SPI controllers use board specific (often SOC specific) bus numbers,
+ * and board-specific addressing for SPI devices combines those numbers
+ * with chip select numbers. Since SPI does not directly support dynamic
+ * device identification, boards need configuration tables telling which
+ * chip is at which address.
+ *
+ * This must be called from context that can sleep. It returns zero on
+ * success, else a negative error code (dropping the master's refcount).
+ * After a successful return, the caller is responsible for calling
+ * spi_unregister_master().
+ */
int spi_register_master(struct spi_master *master)
{
- printf("%s\n", __FUNCTION__);
- return 0;
+ int status = -ENODEV;
+
+ debug("%s: %s:%s\n", __FUNCTION__, master->dev->name, master->dev->id);
+
+ /* even if it's just one always-selected device, there must
+ * be at least one chipselect
+ */
+ if (master->num_chipselect == 0)
+ return -EINVAL;
+
+ /* populate children from any spi device tables */
+ scan_boardinfo(master);
+ status = 0;
+
+ return status;
}
+EXPORT_SYMBOL(spi_register_master);
+
+int spi_sync(struct spi_device *spi, struct spi_message *message)
+{
+ return spi->master->transfer(spi, message);
+}
+