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author | Teresa Gámez <t.gamez@phytec.de> | 2013-06-19 09:09:44 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-06-21 08:05:54 +0200 |
commit | 1806c82ce8c83836972c306db3a46900721179c0 (patch) | |
tree | d44c4f8f49d29c7abe5d0ababb3f8703207125f3 /drivers/spi | |
parent | e3de0065c47679c6398961cd5be3df471e692a5e (diff) | |
download | barebox-1806c82ce8c83836972c306db3a46900721179c0.tar.gz barebox-1806c82ce8c83836972c306db3a46900721179c0.tar.xz |
omap3_spi: Set the correct CS number for AM33xx
Changed the number of CS for AM33xx boards to 2.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/omap3_spi.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 02aacfff21..5c8cc8882a 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -357,16 +357,24 @@ static int omap3_spi_probe(struct device_d *dev) * McSPI3 has 2 CS (bus 3, cs 0 - 1) * McSPI4 has 1 CS (bus 4, cs 0) * + * AM335x McSPI has 2 busses with 2 chip selects: + * McSPI0 has 2 CS (bus 0, cs 0 - 1) + * McSPI1 has 2 CS (bus 1, cs 0 - 1) + * * The board code has to make sure that it does not use * invalid buses or chip selects. */ master->bus_num = dev->id; - master->num_chipselect = 4; + + if (IS_ENABLED(CONFIG_ARCH_OMAP3)) + master->num_chipselect = 4; + else + master->num_chipselect = 2; master->setup = omap3_spi_setup; master->transfer = omap3_spi_transfer; - omap3_master->regs = dev_request_mem_region(dev, 0);; + omap3_master->regs = dev_request_mem_region(dev, 0); spi_reset(master); |