diff options
| author | Alexander Kurz <akurz@blala.de> | 2016-07-27 16:42:04 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-08-03 07:30:41 +0200 |
| commit | 28a0baffb9e70ed6abf5f1123278f7dfed2ed481 (patch) | |
| tree | 11874c9b5201a4c5fcd34e4ae71483a333c159d1 /drivers/spi | |
| parent | 0c619050256735ebe48f1376e320b26b716d64a3 (diff) | |
| download | barebox-28a0baffb9e70ed6abf5f1123278f7dfed2ed481.tar.gz barebox-28a0baffb9e70ed6abf5f1123278f7dfed2ed481.tar.xz | |
ARM i.MX31: add SPI support
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one
of their older vendor extended linux releases. spi_ver_0_4 differs only
in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by
barebox.
Regarding barebox, the differences boil down to the location and length
of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The
spi_ver_0_4 variant is limited to single word bursts with a maximum of
32 bits_per_word.
Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7
implementation.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/spi/imx_spi.c | 15 |
2 files changed, 13 insertions, 4 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 738b88ea5e..9a71b3bc25 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -33,7 +33,7 @@ config DRIVER_SPI_IMX_0_0 config DRIVER_SPI_IMX_0_7 bool - depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX53 + depends on ARCH_IMX25 || ARCH_IMX31 || ARCH_IMX35 || ARCH_IMX53 default y config DRIVER_SPI_IMX_2_3 diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index dc7a8c89f3..806ca67bda 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -206,7 +206,12 @@ static void cspi_0_7_chipselect(struct spi_device *spi, int is_active) reg |= spi_imx_clkdiv_2(clk_get_rate(imx->clk), spi->max_speed_hz) << CSPI_0_7_CTRL_DR_SHIFT; - reg |= (spi->bits_per_word - 1) << CSPI_0_7_CTRL_BL_SHIFT; + if (cpu_is_mx31()) + reg |= ((spi->bits_per_word - 1) & CSPI_0_4_CTRL_BL_MASK) + << CSPI_0_4_CTRL_BL_SHIFT; + else + reg |= (spi->bits_per_word - 1) << CSPI_0_7_CTRL_BL_SHIFT; + reg |= CSPI_0_7_CTRL_SSCTL; if (spi->mode & SPI_CPHA) @@ -215,8 +220,12 @@ static void cspi_0_7_chipselect(struct spi_device *spi, int is_active) reg |= CSPI_0_7_CTRL_POL; if (spi->mode & SPI_CS_HIGH) reg |= CSPI_0_7_CTRL_SSPOL; - if (gpio < 0) - reg |= (gpio + 32) << CSPI_0_7_CTRL_CS_SHIFT; + if (gpio < 0) { + if (cpu_is_mx31()) + reg |= (gpio + 32) << CSPI_0_4_CTRL_CS_SHIFT; + else + reg |= (gpio + 32) << CSPI_0_7_CTRL_CS_SHIFT; + } writel(reg, base + CSPI_0_7_CTRL); |