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author | Teresa Gámez <t.gamez@phytec.de> | 2012-01-19 09:23:14 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-01-23 09:38:27 +0100 |
commit | 4b6aa9088f6366b656c86948bd4527df40f5e8e5 (patch) | |
tree | 65ce21b37d5d80e8cb99537567fd6ee30d74dbd9 /drivers/video | |
parent | 688ed388ef36a357521564572c873dc4c336897a (diff) | |
download | barebox-4b6aa9088f6366b656c86948bd4527df40f5e8e5.tar.gz barebox-4b6aa9088f6366b656c86948bd4527df40f5e8e5.tar.xz |
imx-ipu-fb: Fix offset for IPU Clock.
The offset for the IPU Clock in the CGR1 register is 18 not 22.
See MCIMX35RM table 14-17.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/imx-ipu-fb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c index a3fdb7691a..385f574864 100644 --- a/drivers/video/imx-ipu-fb.c +++ b/drivers/video/imx-ipu-fb.c @@ -735,7 +735,7 @@ static void ipu_fb_enable(struct fb_info *info) /* Start the clock */ reg = readl(IMX_CCM_BASE + CCM_CGR1); - reg |= (3 << 22); + reg |= (3 << 18); writel(reg, IMX_CCM_BASE + CCM_CGR1); /* ipu_idmac.c::ipu_idmac_init() */ |