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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-06-02 11:54:47 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-06-07 12:46:13 +0200 |
| commit | 1e414657fca5afbc02b62068a9f456cf0907ce43 (patch) | |
| tree | 2b11db45925930ce43075cd17330ee312d66a34b /drivers/video | |
| parent | f173bcb384dde795641a990dda55893ad78c4548 (diff) | |
| download | barebox-1e414657fca5afbc02b62068a9f456cf0907ce43.tar.gz barebox-1e414657fca5afbc02b62068a9f456cf0907ce43.tar.xz | |
clk: introduce struct clk_hw
In Linux the ops in struct clk_ops take a struct clk_hw * argument
instead of a struct clk * argument as in barebox. With this taking
new clk drivers from Linux requires a lot of mechanical conversions.
Instead of doing this over and over again swallow the pill once and
convert the existing barebox code over to clk_hw.
The implementation is a little different from Linux. In Linux struct clk
is only known to the core clock code. In barebox struct clk is
publically known and it is embedded into struct clk_hw. This allows
us to still use struct clk members in the clock drivers which we
currently still need, because otherwise this patch would be even
bigger.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210602095507.24609-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/imx-ipu-v3/ipu-di.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/video/imx-ipu-v3/ipu-di.c b/drivers/video/imx-ipu-v3/ipu-di.c index 0f382f8c42..85dde1882e 100644 --- a/drivers/video/imx-ipu-v3/ipu-di.c +++ b/drivers/video/imx-ipu-v3/ipu-di.c @@ -167,9 +167,10 @@ static int ipu_di_clk_calc_div(unsigned long inrate, unsigned long outrate) return div; } -static unsigned long clk_di_recalc_rate(struct clk *clk, +static unsigned long clk_di_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { + struct clk *clk = clk_hw_to_clk(hw); struct ipu_di *di = container_of(clk, struct ipu_di, clk_di_pixel); unsigned long outrate; u32 div = ipu_di_read(di, DI_BS_CLKGEN0); @@ -182,9 +183,10 @@ static unsigned long clk_di_recalc_rate(struct clk *clk, return outrate; } -static long clk_di_round_rate(struct clk *clk, unsigned long rate, +static long clk_di_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { + struct clk *clk = clk_hw_to_clk(hw); struct ipu_di *di = container_of(clk, struct ipu_di, clk_di_pixel); unsigned long outrate; int div; @@ -206,9 +208,10 @@ static long clk_di_round_rate(struct clk *clk, unsigned long rate, return outrate; } -static int clk_di_set_rate(struct clk *clk, unsigned long rate, +static int clk_di_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { + struct clk *clk = clk_hw_to_clk(hw); struct ipu_di *di = container_of(clk, struct ipu_di, clk_di_pixel); int div; u32 clkgen0; @@ -224,8 +227,9 @@ static int clk_di_set_rate(struct clk *clk, unsigned long rate, return 0; } -static int clk_di_get_parent(struct clk *clk) +static int clk_di_get_parent(struct clk_hw *hw) { + struct clk *clk = clk_hw_to_clk(hw); struct ipu_di *di = container_of(clk, struct ipu_di, clk_di_pixel); u32 val; @@ -234,8 +238,9 @@ static int clk_di_get_parent(struct clk *clk) return val & DI_GEN_DI_CLK_EXT ? 1 : 0; } -static int clk_di_set_parent(struct clk *clk, u8 index) +static int clk_di_set_parent(struct clk_hw *hw, u8 index) { + struct clk *clk = clk_hw_to_clk(hw); struct ipu_di *di = container_of(clk, struct ipu_di, clk_di_pixel); u32 val; |