diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-06-10 15:06:10 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-06-11 09:01:39 +0200 |
| commit | d1b73e6da47d330ebdf68891dddbd167e598f87a (patch) | |
| tree | d27398968e2db98bbc7a9c749317d9f6d50e77ff /drivers/watchdog | |
| parent | 7689055a8b037363dae840eee33a0ed43f905b7a (diff) | |
| download | barebox-d1b73e6da47d330ebdf68891dddbd167e598f87a.tar.gz barebox-d1b73e6da47d330ebdf68891dddbd167e598f87a.tar.xz | |
watchdog: dw_wdt: Write counter restart register
At least some variants of the dwc watchdog controllers need the
value 0x76 written to the counter restart register to actually
take the value written to the Timeout range register. Happened
on Rockchip RK3568, without this the watchdog immediately resets
the system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210610130613.27983-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/watchdog')
| -rw-r--r-- | drivers/watchdog/dw_wdt.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c index 17771c7126..bc5d4a889a 100644 --- a/drivers/watchdog/dw_wdt.c +++ b/drivers/watchdog/dw_wdt.c @@ -111,6 +111,9 @@ static int dw_wdt_set_timeout(struct watchdog *wdd, unsigned int top_s) writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET); + writel(WDOG_COUNTER_RESTART_KICK_VALUE, + dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET); + dw_wdt_start(wdd); return 0; |