diff options
| author | Juergen Beisert <jbe@isonoe.(none)> | 2007-10-17 17:57:55 +0200 |
|---|---|---|
| committer | Juergen Beisert <jbe@isonoe.(none)> | 2007-10-17 17:57:55 +0200 |
| commit | 3be8ed2fa1d4813bf11985083850ec7fa47236ed (patch) | |
| tree | 12a67fbeaeedc95f02e1c110bb08a396d1a870bb /drivers | |
| parent | 60f8ee6f3f220383c2bc29ee0316530666c43769 (diff) | |
| download | barebox-3be8ed2fa1d4813bf11985083850ec7fa47236ed.tar.gz barebox-3be8ed2fa1d4813bf11985083850ec7fa47236ed.tar.xz | |
adding i.MX31 CPU support
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/serial/serial_imx.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c index 3312f18d21..b547b6cc30 100644 --- a/drivers/serial/serial_imx.c +++ b/drivers/serial/serial_imx.c @@ -53,6 +53,10 @@ #define BMPR4(base) __REG( 0xcc +(base)) /* BRM Modulator Register 4 */ #define UTS(base) __REG( 0xd0 +(base)) /* UART Test Register */ #endif +#ifdef CONFIG_ARCH_IMX31 +# define ONEMS(base) __REG( 0xb0 +(base)) /* One Millisecond register (i.MX27) */ +# define UTS(base) __REG( 0xb4 +(base)) /* UART Test Register */ +#endif /* UART Control Register Bit Fields.*/ #define URXD_CHARRDY (1<<15) @@ -146,13 +150,20 @@ #define UTS_RXFULL (1<<3) /* RxFIFO full */ #define UTS_SOFTRST (1<<0) /* Software reset */ +/* + * create default values for different platforms + */ #ifdef CONFIG_ARCH_IMX1 -#define UCR3_VAL 0 -#define UCR4_VAL (UCR4_CTSTL_32 | UCR4_REF16) +# define UCR3_VAL 0 +# define UCR4_VAL (UCR4_CTSTL_32 | UCR4_REF16) #endif #ifdef CONFIG_ARCH_IMX27 -#define UCR3_VAL (0x700 | UCR3_RXDMUXSEL) -#define UCR4_VAL UCR4_CTSTL_32 +# define UCR3_VAL (0x700 | UCR3_RXDMUXSEL) +# define UCR4_VAL UCR4_CTSTL_32 +#endif +#ifdef CONFIG_ARCH_IMX31 +# define UCR3_VAL (0x700 | UCR3_RXDMUXSEL) +# define UCR4_VAL UCR4_CTSTL_32 #endif static int imx_serial_reffreq(ulong base) |