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| author | Ivo Clarysse <ivo.clarysse@gmail.com> | 2010-01-28 12:21:18 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-01-29 09:33:02 +0100 |
| commit | 512a1c80ce964ae5ed65e0601fb5267b61cc308a (patch) | |
| tree | 1b3c121947ddd14b58e3a412745c6d423043faaa /drivers | |
| parent | 33b842d3ce5df273a02d2e4f4f51fe3d8565a3b9 (diff) | |
| download | barebox-512a1c80ce964ae5ed65e0601fb5267b61cc308a.tar.gz barebox-512a1c80ce964ae5ed65e0601fb5267b61cc308a.tar.xz | |
Fix nand_imx for i.MX21
Recent changes to the nand_imx driver broke it for i.MX21 systems;
the i.MX21 NAND controller is more akin to the one in i.MX27/i.MX31,
than to the one in i.MX25/i.MX35.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/nand/nand_imx.c | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/drivers/nand/nand_imx.c b/drivers/nand/nand_imx.c index 5811e276e3..831ba628df 100644 --- a/drivers/nand/nand_imx.c +++ b/drivers/nand/nand_imx.c @@ -32,8 +32,8 @@ #define DVR_VER "2.0" -#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx21()) -#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27()) +#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35()) +#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) /* * Addresses for NFC registers @@ -249,8 +249,18 @@ static void __nand_boot_init send_cmd(struct imx_nand_host *host, u16 cmd) writew(cmd, host->regs + NFC_FLASH_CMD); writew(NFC_CMD, host->regs + NFC_CONFIG2); - /* Wait for operation to complete */ - wait_op_done(host); + if (cpu_is_mx21() && (cmd == NAND_CMD_RESET)) { + /* Reset completion is indicated by NFC_CONFIG2 */ + /* being set to 0 */ + int i; + for (i = 0; i < 100000; i++) { + if (readw(host->regs + NFC_CONFIG2) == 0) { + break; + } + } + } else + /* Wait for operation to complete */ + wait_op_done(host); } /* @@ -826,9 +836,13 @@ static int __init imxnd_probe(struct device_d *dev) struct nand_ecclayout *oob_smallpage, *oob_largepage; u16 tmp; int err = 0; + #ifdef CONFIG_ARCH_IMX27 PCCR1 |= PCCR1_NFC_BAUDEN; #endif +#ifdef CONFIG_ARCH_IMX21 + PCCR0 |= PCCR0_NFC_EN; +#endif /* Allocate memory for MTD device structure and private data */ host = kzalloc(sizeof(struct imx_nand_host) + NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE, GFP_KERNEL); @@ -1015,7 +1029,13 @@ void __nand_boot_init imx_nand_load_image(void *dest, int size) { struct imx_nand_host host; u32 tmp, page, block, blocksize, pagesize; - +#ifdef CONFIG_ARCH_IMX21 + tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14); + if (tmp & (1 << 5)) + host.pagesize_2k = 1; + else + host.pagesize_2k = 0; +#endif #ifdef CONFIG_ARCH_IMX27 tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14); if (tmp & (1 << 5)) |