diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-12-07 08:12:39 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-12-07 08:12:39 +0100 |
commit | 4e8a0f2110d799a7609c61a3eccb12dc2cd0b21d (patch) | |
tree | 863d686c7b6aa0d41949bae3f07bb62b12a28146 /drivers | |
parent | 0b5361a328632e64c14a54306119093a0c7fecdf (diff) | |
parent | 151ab20210367e7774f2caff705ad3aac85ade3e (diff) | |
download | barebox-4e8a0f2110d799a7609c61a3eccb12dc2cd0b21d.tar.gz barebox-4e8a0f2110d799a7609c61a3eccb12dc2cd0b21d.tar.xz |
Merge branch 'for-next/checkpatch'
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/base/driver.c | 2 | ||||
-rw-r--r-- | drivers/clk/imx/clk-cpu.c | 4 | ||||
-rw-r--r-- | drivers/clocksource/Kconfig | 9 | ||||
-rw-r--r-- | drivers/clocksource/Makefile | 1 | ||||
-rw-r--r-- | drivers/clocksource/dw_apb_timer.c | 148 | ||||
-rw-r--r-- | drivers/mfd/da9063.c | 2 | ||||
-rw-r--r-- | drivers/mtd/nand/atmel_nand.c | 1 | ||||
-rw-r--r-- | drivers/net/e1000/eeprom.c | 2 | ||||
-rw-r--r-- | drivers/net/e1000/main.c | 2 | ||||
-rw-r--r-- | drivers/of/partition.c | 4 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-tegra30.c | 4 | ||||
-rw-r--r-- | drivers/rtc/rtc-ds1307.c | 4 | ||||
-rw-r--r-- | drivers/usb/gadget/at91_udc.c | 3 | ||||
-rw-r--r-- | drivers/usb/musb/musb_gadget_ep0.c | 7 | ||||
-rw-r--r-- | drivers/video/ssd1307fb.c | 7 |
15 files changed, 183 insertions, 17 deletions
diff --git a/drivers/base/driver.c b/drivers/base/driver.c index 4acc4cfa1e..1fd890542e 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c @@ -177,7 +177,7 @@ int register_device(struct device_d *new_device) new_device->id = get_free_deviceid(new_device->name); } else { if (get_device_by_name_id(new_device->name, new_device->id)) { - eprintf("register_device: already registered %s\n", + pr_err("register_device: already registered %s\n", dev_name(new_device)); return -EINVAL; } diff --git a/drivers/clk/imx/clk-cpu.c b/drivers/clk/imx/clk-cpu.c index 5ac0ed1789..473500131e 100644 --- a/drivers/clk/imx/clk-cpu.c +++ b/drivers/clk/imx/clk-cpu.c @@ -111,8 +111,10 @@ struct clk *imx_clk_cpu(const char *name, const char *parent_name, cpu->clk.num_parents = 1; ret = clk_register(&cpu->clk); - if (ret) + if (ret) { free(cpu); + return NULL; + } return &cpu->clk; } diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 3caf72503a..337a7a2e13 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -1,3 +1,5 @@ +menu "Clocksource" + config ARCH_HAS_IMX_GPT bool @@ -80,3 +82,10 @@ config CLOCKSOURCE_ARM_GLOBAL_TIMER config CLOCKSOURCE_IMX_GPT def_bool y depends on ARCH_HAS_IMX_GPT + +config CLOCKSOURCE_DW_APB_TIMER + bool "DW APB timer driver" + help + Enables the support for the dw_apb timer. + +endmenu diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index ce4d74137a..ab78f0700d 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_CLOCKSOURCE_ATMEL_PIT) += timer-atmel-pit.o obj-$(CONFIG_CLOCKSOURCE_ARMV8_TIMER) += armv8-timer.o obj-$(CONFIG_CLOCKSOURCE_ARM_GLOBAL_TIMER) += arm_global_timer.o obj-$(CONFIG_CLOCKSOURCE_IMX_GPT) += timer-imx-gpt.o +obj-$(CONFIG_CLOCKSOURCE_DW_APB_TIMER) += dw_apb_timer.o diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c new file mode 100644 index 0000000000..82ad6bccbc --- /dev/null +++ b/drivers/clocksource/dw_apb_timer.c @@ -0,0 +1,148 @@ +/* + * (C) Copyright 2009 Intel Corporation + * Author: Jacob Pan (jacob.jun.pan@intel.com) + * + * Shared with ARM platforms, Jamie Iles, Picochip 2011 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Support for the Synopsys DesignWare APB Timers. + * + * + * Taken from linux-4.9 kernel and adapted to barebox. + */ +#include <common.h> +#include <clock.h> +#include <init.h> + +#include <linux/clk.h> +#include <linux/err.h> + +#define APBT_MIN_PERIOD 4 +#define APBT_MIN_DELTA_USEC 200 + +#define APBTMR_N_LOAD_COUNT 0x00 +#define APBTMR_N_CURRENT_VALUE 0x04 +#define APBTMR_N_CONTROL 0x08 +#define APBTMR_N_EOI 0x0c +#define APBTMR_N_INT_STATUS 0x10 + +#define APBTMRS_INT_STATUS 0xa0 +#define APBTMRS_EOI 0xa4 +#define APBTMRS_RAW_INT_STATUS 0xa8 +#define APBTMRS_COMP_VERSION 0xac + +#define APBTMR_CONTROL_ENABLE (1 << 0) +/* 1: periodic, 0:free running. */ +#define APBTMR_CONTROL_MODE_PERIODIC (1 << 1) +#define APBTMR_CONTROL_INT (1 << 2) + +#define APBTMRS_REG_SIZE 0x14 + +struct dw_apb_timer { + void __iomem *base; + unsigned long freq; + int irq; +}; + +static struct dw_apb_timer timer; + +static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) +{ + return readl(timer->base + offs); +} + +static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, + unsigned long offs) +{ + writel(val, timer->base + offs); +} + +/** + * dw_apb_clocksource_start() - start the clocksource counting. + * + * @clksrc: The clocksource to start. + * + * This is used to start the clocksource before registration and can be used + * to enable calibration of timers. + */ +static int dw_apb_clocksource_start(struct clocksource *clksrc) +{ + /* + * start count down from 0xffff_ffff. this is done by toggling the + * enable bit then load initial load count to ~0. + */ + uint32_t ctrl = apbt_readl(&timer, APBTMR_N_CONTROL); + + ctrl &= ~APBTMR_CONTROL_ENABLE; + apbt_writel(&timer, ctrl, APBTMR_N_CONTROL); + apbt_writel(&timer, ~0, APBTMR_N_LOAD_COUNT); + + /* enable, mask interrupt */ + ctrl &= ~APBTMR_CONTROL_MODE_PERIODIC; + ctrl |= (APBTMR_CONTROL_ENABLE | APBTMR_CONTROL_INT); + apbt_writel(&timer, ctrl, APBTMR_N_CONTROL); + + return 0; +} + +static uint64_t dw_apb_clocksource_read(void) +{ + return (uint64_t) ~apbt_readl(&timer, APBTMR_N_CURRENT_VALUE); +} + +static struct clocksource dw_apb_clksrc = { + .init = dw_apb_clocksource_start, + .read = dw_apb_clocksource_read, + .mask = CLOCKSOURCE_MASK(32), + .shift = 0, +}; + +static int dw_apb_timer_probe(struct device_d *dev) +{ + struct device_node *np = dev->device_node; + struct resource *iores; + struct clk *clk; + uint32_t clk_freq; + + /* use only one timer */ + if (timer.base) + return -EBUSY; + + iores = dev_request_mem_resource(dev, 0); + if (IS_ERR(iores)) { + dev_err(dev, "could not get memory region\n"); + return PTR_ERR(iores); + } + + timer.base = IOMEM(iores->start); + + /* Get clock frequency */ + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk)); + return PTR_ERR(clk); + } + + clk_freq = clk_get_rate(clk); + clk_put(clk); + + dw_apb_clksrc.mult = clocksource_hz2mult(clk_freq, dw_apb_clksrc.shift); + + return init_clock(&dw_apb_clksrc); +} + +static struct of_device_id dw_apb_timer_dt_ids[] = { + { .compatible = "snps,dw-apb-timer", }, + { } +}; + +static struct driver_d dw_apb_timer_driver = { + .name = "dw-apb-timer", + .probe = dw_apb_timer_probe, + .of_compatible = DRV_OF_COMPAT(dw_apb_timer_dt_ids), +}; + +device_platform_driver(dw_apb_timer_driver); diff --git a/drivers/mfd/da9063.c b/drivers/mfd/da9063.c index b6114a614b..a7fff2c5bf 100644 --- a/drivers/mfd/da9063.c +++ b/drivers/mfd/da9063.c @@ -201,7 +201,7 @@ static int da9062_device_init(struct da9063 *priv) priv->client1 = i2c_new_dummy(priv->client->adapter, priv->client->addr + 1); - if (!priv) { + if (!priv->client1) { dev_warn(priv->dev, "failed to create bank 1 device\n"); /* TODO: return -EINVAL; i2c api does not return more * details */ diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 797cdc2ba6..4c1725d096 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -788,7 +788,6 @@ static int pmecc_build_galois_table(unsigned int mm, int16_t *index_of, case 3: case 4: case 6: - case 15: p[1] = 1; break; case 5: diff --git a/drivers/net/e1000/eeprom.c b/drivers/net/e1000/eeprom.c index 180b32ede8..ce74a8b200 100644 --- a/drivers/net/e1000/eeprom.c +++ b/drivers/net/e1000/eeprom.c @@ -883,7 +883,7 @@ static int e1000_flash_mode_erase_chunk(struct e1000_hw *hw, loff_t offset, ret = e1000_poll_reg(hw, E1000_FLSWCTL, E1000_FLSWCTL_DONE | E1000_FLSWCTL_FLBUSY, E1000_FLSWCTL_DONE, - 10 * SECOND); + 40 * SECOND); if (ret < 0) { dev_err(hw->dev, "Timeout waiting for FLSWCTL.DONE to be set (erase)\n"); diff --git a/drivers/net/e1000/main.c b/drivers/net/e1000/main.c index bb6ab4eb03..caa7274a8d 100644 --- a/drivers/net/e1000/main.c +++ b/drivers/net/e1000/main.c @@ -1130,7 +1130,7 @@ static int32_t e1000_set_d3_lplu_state_off(struct e1000_hw *hw) { uint32_t phy_ctrl = 0; int32_t ret_val; - uint16_t phy_data; + uint16_t phy_data = 0; DEBUGFUNC(); /* During driver activity LPLU should not be used or it will attain link diff --git a/drivers/of/partition.c b/drivers/of/partition.c index aa6e601b7f..2848b9636d 100644 --- a/drivers/of/partition.c +++ b/drivers/of/partition.c @@ -186,11 +186,11 @@ static int of_partition_fixup(struct device_node *root, void *ctx) return ret; } - of_property_write_u32(partnode, "#size-cells", n_cells); + ret = of_property_write_u32(partnode, "#size-cells", n_cells); if (ret) return ret; - of_property_write_u32(partnode, "#address-cells", n_cells); + ret = of_property_write_u32(partnode, "#address-cells", n_cells); if (ret) return ret; diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c index d9b49c57d9..ffb04eebbf 100644 --- a/drivers/pinctrl/pinctrl-tegra30.c +++ b/drivers/pinctrl/pinctrl-tegra30.c @@ -658,8 +658,8 @@ static int pinctrl_tegra30_set_drvstate(struct pinctrl_tegra30 *ctrl, break; } } - /* if no matching drivegroup is found */ - if (i == ctrl->drvdata->num_drvgrps) + + if (!group) return 0; regaddr = ctrl->regs.ctrl + (group->reg >> 2); diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index bb597305e5..f1feee4689 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c @@ -348,10 +348,10 @@ static int ds1307_probe(struct device_d *dev) ds1307->regs[1] &= ~DS1341_BIT_ECLK; /* - * Let's set additionale RTC bits to + * Let's set additional RTC bits to * facilitate maximum power saving. */ - ds1307->regs[0] |= DS1341_BIT_DOSF; + ds1307->regs[1] |= DS1341_BIT_DOSF; ds1307->regs[0] &= ~DS1341_BIT_EGFIL; i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 729f752128..243656d443 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -288,8 +288,7 @@ static int at91_ep_enable(struct usb_ep *_ep, u16 maxpacket; u32 tmp; - if (!_ep || !ep - || !desc || ep->desc + if (!desc || ep->desc || _ep->name == ep0name || desc->bDescriptorType != USB_DT_ENDPOINT || (maxpacket = le16_to_cpu(desc->wMaxPacketSize)) == 0 diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c index feaa856451..c8f55ac32c 100644 --- a/drivers/usb/musb/musb_gadget_ep0.c +++ b/drivers/usb/musb/musb_gadget_ep0.c @@ -110,6 +110,11 @@ static int service_tx_status_request( break; } + if (epnum >= MUSB_C_NUM_EPS) { + handled = -EINVAL; + break; + } + is_in = epnum & USB_DIR_IN; if (is_in) { epnum &= 0x0f; @@ -119,7 +124,7 @@ static int service_tx_status_request( } regs = musb->endpoints[epnum].regs; - if (epnum >= MUSB_C_NUM_EPS || !ep->desc) { + if (!ep->desc) { handled = -EINVAL; break; } diff --git a/drivers/video/ssd1307fb.c b/drivers/video/ssd1307fb.c index d68f0c5056..70077e43a8 100644 --- a/drivers/video/ssd1307fb.c +++ b/drivers/video/ssd1307fb.c @@ -548,8 +548,10 @@ static int ssd1307fb_probe(struct device_d *dev) /* clear display */ array = ssd1307fb_alloc_array(par->width * par->height / 8, SSD1307FB_DATA); - if (!array) - return -ENOMEM; + if (!array) { + ret = -ENOMEM; + goto panel_init_error; + } for (i = 0; i < (par->height / 8); i++) { for (j = 0; j < par->width; j++) { @@ -569,6 +571,7 @@ static int ssd1307fb_probe(struct device_d *dev) panel_init_error: reset_oled_error: + free(vmem); fb_alloc_error: regulator_disable(par->vbat); free(info); |