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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2016-02-17 11:56:58 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-04-12 12:02:37 +0200
commit595a67c0fcaa58c24fea13d595ed540c01d64e3c (patch)
treedd67352f531d4687f5d0bafdf93f06e4151adef0 /drivers
parentea569a0afd6a2e9a84418cd18ddeaeefaa5eae39 (diff)
downloadbarebox-595a67c0fcaa58c24fea13d595ed540c01d64e3c.tar.gz
ARM: i.MX25: Add some more clocks
Add some clocks needed for: - RNGB - SCC - Dryice RTC Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/imx/clk-imx25.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
index baa42e1..ce4fbed 100644
--- a/drivers/clk/imx/clk-imx25.c
+++ b/drivers/clk/imx/clk-imx25.c
@@ -95,7 +95,7 @@ static int imx25_ccm_probe(struct device_d *dev)
writel((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 8) | (1 << 9) |
(1 << 10) | (1 << 15) | (1 << 19) | (1 << 21) | (1 << 22) |
- (1 << 23) | (1 << 24) | (1 << 28),
+ (1 << 23) | (1 << 24) | (1 << 25) | (1 << 28),
base + CCM_CGCR0);
writel((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 13) | (1 << 14) |
@@ -152,7 +152,9 @@ static int imx25_ccm_probe(struct device_d *dev)
clks[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", base + CCM_CGCR0, 24);
clks[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", base + CCM_CGCR1, 29);
clks[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", base + CCM_CGCR0, 7);
+ clks[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", base + CCM_CGCR2, 5);
clks[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", base + CCM_CGCR2, 3);
+ clks[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", base + CCM_CGCR1, 8);
clkdev_add_physbase(clks[per15], MX25_UART1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per15], MX25_UART2_BASE_ADDR, NULL);
@@ -176,6 +178,9 @@ static int imx25_ccm_probe(struct device_d *dev)
clkdev_add_physbase(clks[lcdc_ipg_per], MX25_LCDC_BASE_ADDR, "per");
clkdev_add_physbase(clks[lcdc_ipg], MX25_LCDC_BASE_ADDR, "ipg");
clkdev_add_physbase(clks[lcdc_ahb], MX25_LCDC_BASE_ADDR, "ahb");
+ clkdev_add_physbase(clks[scc_ipg], MX25_SCC_BASE_ADDR, "ipg");
+ clkdev_add_physbase(clks[rngb_ipg], MX25_RNGB_BASE_ADDR, "ipg");
+ clkdev_add_physbase(clks[dryice_ipg], MX25_DRYICE_BASE_ADDR, NULL);
return 0;
}