summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-12-16 21:18:46 -0800
committerSascha Hauer <s.hauer@pengutronix.de>2019-01-08 16:28:47 +0100
commit6d0393e12bcda21465c514e6a34947bfd7c8727d (patch)
tree515ff13d4cc788dd8c4e27f9b221de758a90906b /drivers
parent4bf640ac6118b40d34ab7215dc4ce12d9cadaf2d (diff)
downloadbarebox-6d0393e12bcda21465c514e6a34947bfd7c8727d.tar.gz
barebox-6d0393e12bcda21465c514e6a34947bfd7c8727d.tar.xz
PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll()
Port of Linux commit a26e0108b61d6e65c151af720f2c4248a38f000d dw_pcie_readl_unroll() and dw_pcie_writel_unroll() duplicate what dw_pcie_readl_rc() and dw_pcie_writel_rc() already do, so call them directly. [bhelgaas: reworked into patch series] Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/pcie-designware.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c
index c548ae87eb..fd529c114a 100644
--- a/drivers/pci/pcie-designware.c
+++ b/drivers/pci/pcie-designware.c
@@ -162,10 +162,7 @@ static inline u32 dw_pcie_readl_unroll(struct pcie_port *pp, u32 index, u32 reg)
{
u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
- if (pp->ops->readl_rc)
- return pp->ops->readl_rc(pp, pp->dbi_base + offset + reg);
-
- return readl(pp->dbi_base + offset + reg);
+ return dw_pcie_readl_rc(pp, offset + reg);
}
static inline void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
@@ -173,10 +170,7 @@ static inline void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
{
u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
- if (pp->ops->writel_rc)
- pp->ops->writel_rc(pp, val, pp->dbi_base + offset + reg);
- else
- writel(val, pp->dbi_base + offset + reg);
+ dw_pcie_writel_rc(pp, val, offset + reg);
}
#include <abort.h>