ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel

Use the potentially endianness-changing readl, writel and siblings
directly. They looks prettier and are the correct thing to do, as
even if the CPU is in big-endian mode, the peripherals are little-endian.

Unlike Linux, barebox readl,writel are the same Linux'
{readl,writel}_relaxed (they don't imply memory barriers)
and thus there shouldn't be any functional change.

Patch was generated by a mass search and replace. I looked it over,
adjust some whitespace and further verified by reviewing the output of

	git diff HEAD~1 --word-diff | \
		perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \
		-e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+'

which filters out the common case of lines where a single
__raw_{readT,writeT} had its __raw_ prefix stripped without any
further changes.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

8 files changed, 71 insertions, 71 deletions

diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c
index e23f1e5ec4..6e86653480 100644
--- a/drivers/clocksource/timer-atmel-pit.c
+++ b/drivers/clocksource/timer-atmel-pit.c
@@ -35,8 +35,8 @@
 #include <linux/err.h>
 
 #define PIT_CPIV(x)	((x) & AT91_PIT_CPIV)
-#define pit_write(reg, val)	__raw_writel(val, pit_base + reg)
-#define pit_read(reg)		__raw_readl(pit_base + reg)
+#define pit_write(reg, val)	writel(val, pit_base + reg)
+#define pit_read(reg)		readl(pit_base + reg)
 
 static __iomem void *pit_base;
 
diff --git a/drivers/mci/atmel-mci-regs.h b/drivers/mci/atmel-mci-regs.h
index af1dba00f9..2866e3eb77 100644
--- a/drivers/mci/atmel-mci-regs.h
+++ b/drivers/mci/atmel-mci-regs.h
@@ -138,9 +138,9 @@
 
 /* Register access macros */
 #define atmci_readl(port,reg)				\
-	__raw_readl((port)->regs + reg)
+	readl((port)->regs + reg)
 #define atmci_writel(port,reg,value)			\
-	__raw_writel((value), (port)->regs + reg)
+	writel((value), (port)->regs + reg)
 
 /* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
 #ifdef CONFIG_AVR32
diff --git a/drivers/net/at91_ether.h b/drivers/net/at91_ether.h
index 08df6f161c..21c2ae94da 100644
--- a/drivers/net/at91_ether.h
+++ b/drivers/net/at91_ether.h
@@ -33,7 +33,7 @@ struct rbf_t
  */
 static inline unsigned long at91_emac_read(unsigned int reg)
 {
-	return __raw_readl(AT91_VA_BASE_EMAC + reg);
+	return readl(AT91_VA_BASE_EMAC + reg);
 }
 
 /*
@@ -41,6 +41,6 @@ static inline unsigned long at91_emac_read(unsigned int reg)
  */
 static inline void at91_emac_write(unsigned int reg, unsigned long value)
 {
-	__raw_writel(value, AT91_VA_BASE_EMAC + reg);
+	writel(value, AT91_VA_BASE_EMAC + reg);
 }
 #endif
diff --git a/drivers/net/macb.h b/drivers/net/macb.h
index 979f53cb71..fda4d08663 100644
--- a/drivers/net/macb.h
+++ b/drivers/net/macb.h
@@ -334,13 +334,13 @@
 
 /* Register access macros */
 #define macb_readl(port,reg)				\
-	__raw_readl((port)->regs + MACB_##reg)
+	readl((port)->regs + MACB_##reg)
 #define macb_writel(port,reg,value)			\
-	__raw_writel((value), (port)->regs + MACB_##reg)
+	writel((value), (port)->regs + MACB_##reg)
 #define gem_readl(port, reg)				\
-	__raw_readl((port)->regs + GEM_##reg)
+	readl((port)->regs + GEM_##reg)
 #define gem_writel(port, reg, value)			\
-	__raw_writel((value), (port)->regs + GEM_##reg)
+	writel((value), (port)->regs + GEM_##reg)
 
 /*
  * Conditional GEM/MACB macros.  These perform the operation to the correct
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 11e00833c5..9b366e4812 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -303,11 +303,11 @@ static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask)
 {
 	unsigned select;
 
-	if (__raw_readl(pio + PIO_PSR) & mask)
+	if (readl(pio + PIO_PSR) & mask)
 		return AT91_MUX_GPIO;
 
-	select = !!(__raw_readl(pio + PIO_ABCDSR1) & mask);
-	select |= (!!(__raw_readl(pio + PIO_ABCDSR2) & mask) << 1);
+	select = !!(readl(pio + PIO_ABCDSR1) & mask);
+	select |= (!!(readl(pio + PIO_ABCDSR2) & mask) << 1);
 
 	return select + 1;
 }
@@ -316,34 +316,34 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
 {
 	unsigned select;
 
-	if (__raw_readl(pio + PIO_PSR) & mask)
+	if (readl(pio + PIO_PSR) & mask)
 		return AT91_MUX_GPIO;
 
-	select = __raw_readl(pio + PIO_ABSR) & mask;
+	select = readl(pio + PIO_ABSR) & mask;
 
 	return select + 1;
 }
 
 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
 {
-	return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
+	return (readl(pio + PIO_IFSR) >> pin) & 0x1;
 }
 
 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
 {
-	*div = __raw_readl(pio + PIO_SCDR);
+	*div = readl(pio + PIO_SCDR);
 
-	return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1;
+	return (readl(pio + PIO_IFSCSR) >> pin) & 0x1;
 }
 
 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
 {
-	return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1;
+	return (readl(pio + PIO_PPDSR) >> pin) & 0x1;
 }
 
 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
 {
-	return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
+	return (readl(pio + PIO_SCHMITT) >> pin) & 0x1;
 }
 
 static struct at91_pinctrl_mux_ops at91rm9200_ops = {
@@ -559,7 +559,7 @@ static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
 	unsigned mask = 1 << offset;
 
 	at91_mux_gpio_set(pio, mask, value);
-	__raw_writel(mask, pio + PIO_OER);
+	writel(mask, pio + PIO_OER);
 
 	return 0;
 }
@@ -571,8 +571,8 @@ static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
 	unsigned mask = 1 << offset;
 	u32 osr;
 
-	if (mask & __raw_readl(pio + PIO_PSR)) {
-		osr = __raw_readl(pio + PIO_OSR);
+	if (mask & readl(pio + PIO_PSR)) {
+		osr = readl(pio + PIO_OSR);
 		return !(osr & mask);
 	} else {
 		return -EBUSY;
@@ -585,7 +585,7 @@ static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 	void __iomem *pio = at91_gpio->regbase;
 	unsigned mask = 1 << offset;
 
-	__raw_writel(mask, pio + PIO_ODR);
+	writel(mask, pio + PIO_ODR);
 
 	return 0;
 }
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 3f4d7ba124..7c4806981f 100644
--- a/drivers/spi/atmel_spi.h
+++ b/drivers/spi/atmel_spi.h
@@ -161,8 +161,8 @@
 
 /* Register access macros */
 #define spi_readl(port, reg) \
-	__raw_readl((port)->regs + SPI_##reg)
+	readl((port)->regs + SPI_##reg)
 #define spi_writel(port, reg, value) \
-	__raw_writel((value), (port)->regs + SPI_##reg)
+	writel((value), (port)->regs + SPI_##reg)
 
 #endif /* __ATMEL_SPI_H__ */
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 243656d443..efbc574c23 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -65,9 +65,9 @@
 static const char ep0name[] = "ep0";
 
 #define at91_udp_read(udc, reg) \
-	__raw_readl((udc)->udp_baseaddr + (reg))
+	readl((udc)->udp_baseaddr + (reg))
 #define at91_udp_write(udc, reg, val) \
-	__raw_writel((val), (udc)->udp_baseaddr + (reg))
+	writel((val), (udc)->udp_baseaddr + (reg))
 
 /*-------------------------------------------------------------------------*/
 
@@ -136,7 +136,7 @@ static int read_fifo (struct at91_ep *ep, struct at91_request *req)
 	 * or if we already emptied both pingpong buffers
 	 */
 rescan:
-	csr = __raw_readl(creg);
+	csr = readl(creg);
 	if ((csr & RX_DATA_READY) == 0)
 		return 0;
 
@@ -162,7 +162,7 @@ rescan:
 		}
 	} else
 		csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
-	__raw_writel(csr, creg);
+	writel(csr, creg);
 
 	req->req.actual += count;
 	is_done = (count < ep->ep.maxpacket);
@@ -184,7 +184,7 @@ rescan:
 		 * CSR returns bad RXCOUNT when read too soon after updating
 		 * RX_DATA_BK flags.
 		 */
-		csr = __raw_readl(creg);
+		csr = readl(creg);
 
 		bufferspace -= count;
 		buf += count;
@@ -198,7 +198,7 @@ rescan:
 static int write_fifo(struct at91_ep *ep, struct at91_request *req)
 {
 	u32 __iomem	*creg = ep->creg;
-	u32		csr = __raw_readl(creg);
+	u32		csr = readl(creg);
 	u8 __iomem	*dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
 	unsigned	total, count, is_last;
 	u8		*buf;
@@ -219,8 +219,8 @@ static int write_fifo(struct at91_ep *ep, struct at91_request *req)
 		if (csr & AT91_UDP_TXCOMP) {
 			csr |= CLR_FX;
 			csr &= ~(SET_FX | AT91_UDP_TXCOMP);
-			__raw_writel(csr, creg);
-			csr = __raw_readl(creg);
+			writel(csr, creg);
+			csr = readl(creg);
 		}
 		if (csr & AT91_UDP_TXPKTRDY)
 			return 0;
@@ -340,7 +340,7 @@ ok:
 		tmp |= 0x04;
 	tmp <<= 8;
 	tmp |= AT91_UDP_EPEDS;
-	__raw_writel(tmp, ep->creg);
+	writel(tmp, ep->creg);
 
 	ep->desc = desc;
 	ep->ep.maxpacket = maxpacket;
@@ -373,7 +373,7 @@ static int at91_ep_disable (struct usb_ep * _ep)
 	if (ep->udc->clocked) {
 		at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
 		at91_udp_write(udc, AT91_UDP_RST_EP, 0);
-		__raw_writel(0, ep->creg);
+		writel(0, ep->creg);
 	}
 
 	return 0;
@@ -471,10 +471,10 @@ static int at91_ep_queue(struct usb_ep *_ep,
 ep0_in_status:
 				PACKET("ep0 in/status\n");
 				status = 0;
-				tmp = __raw_readl(ep->creg);
+				tmp = readl(ep->creg);
 				tmp &= ~SET_FX;
 				tmp |= CLR_FX | AT91_UDP_TXPKTRDY;
-				__raw_writel(tmp, ep->creg);
+				writel(tmp, ep->creg);
 				udc->req_pending = 0;
 				goto done;
 			}
@@ -534,7 +534,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value)
 
 	creg = ep->creg;
 
-	csr = __raw_readl(creg);
+	csr = readl(creg);
 
 	/*
 	 * fail with still-busy IN endpoints, ensuring correct sequencing
@@ -554,7 +554,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value)
 			at91_udp_write(udc, AT91_UDP_RST_EP, 0);
 			csr &= ~AT91_UDP_FORCESTALL;
 		}
-		__raw_writel(csr, creg);
+		writel(csr, creg);
 	}
 
 	return status;
@@ -760,7 +760,7 @@ static int handle_ep(struct at91_ep *ep)
 {
 	struct at91_request	*req;
 	u32 __iomem		*creg = ep->creg;
-	u32			csr = __raw_readl(creg);
+	u32			csr = readl(creg);
 
 	if (!list_empty(&ep->queue))
 		req = list_entry(ep->queue.next,
@@ -772,7 +772,7 @@ static int handle_ep(struct at91_ep *ep)
 		if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) {
 			csr |= CLR_FX;
 			csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP);
-			__raw_writel(csr, creg);
+			writel(csr, creg);
 		}
 		if (req)
 			return write_fifo(ep, req);
@@ -784,8 +784,8 @@ static int handle_ep(struct at91_ep *ep)
 				req->req.status = -EILSEQ;
 			csr |= CLR_FX;
 			csr &= ~(SET_FX | AT91_UDP_STALLSENT);
-			__raw_writel(csr, creg);
-			csr = __raw_readl(creg);
+			writel(csr, creg);
+			csr = readl(creg);
 		}
 		if (req && (csr & RX_DATA_READY))
 			return read_fifo(ep, req);
@@ -811,7 +811,7 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 	rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16;
 	if (likely(rxcount == 8)) {
 		while (rxcount--)
-			pkt.raw[i++] = __raw_readb(dreg);
+			pkt.raw[i++] = readb(dreg);
 		if (pkt.r.bRequestType & USB_DIR_IN) {
 			csr |= AT91_UDP_DIR;
 			ep->is_in = 1;
@@ -826,7 +826,7 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 	}
 	csr |= CLR_FX;
 	csr &= ~(SET_FX | AT91_UDP_RXSETUP);
-	__raw_writel(csr, creg);
+	writel(csr, creg);
 	udc->wait_for_addr_ack = 0;
 	udc->wait_for_config_ack = 0;
 	ep->stopped = 0;
@@ -846,14 +846,14 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 	 * hardware ... notably for device and endpoint features.
 	 */
 	udc->req_pending = 1;
-	csr = __raw_readl(creg);
+	csr = readl(creg);
 	csr |= CLR_FX;
 	csr &= ~SET_FX;
 	switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) {
 
 	case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
 			| USB_REQ_SET_ADDRESS:
-		__raw_writel(csr | AT91_UDP_TXPKTRDY, creg);
+		writel(csr | AT91_UDP_TXPKTRDY, creg);
 		udc->addr = w_value;
 		udc->wait_for_addr_ack = 1;
 		udc->req_pending = 0;
@@ -882,8 +882,8 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 		if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR)
 			tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP);
 		PACKET("get device status\n");
-		__raw_writeb(tmp, dreg);
-		__raw_writeb(0, dreg);
+		writeb(tmp, dreg);
+		writeb(0, dreg);
 		goto write_in;
 		/* then STATUS starts later, automatically */
 	case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
@@ -910,8 +910,8 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 	case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
 			| USB_REQ_GET_STATUS:
 		PACKET("get interface status\n");
-		__raw_writeb(0, dreg);
-		__raw_writeb(0, dreg);
+		writeb(0, dreg);
+		writeb(0, dreg);
 		goto write_in;
 		/* then STATUS starts later, automatically */
 	case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
@@ -939,12 +939,12 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 				goto stall;
 		}
 		PACKET("get %s status\n", ep->ep.name);
-		if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL)
+		if (readl(ep->creg) & AT91_UDP_FORCESTALL)
 			tmp = (1 << USB_ENDPOINT_HALT);
 		else
 			tmp = 0;
-		__raw_writeb(tmp, dreg);
-		__raw_writeb(0, dreg);
+		writeb(tmp, dreg);
+		writeb(0, dreg);
 		goto write_in;
 		/* then STATUS starts later, automatically */
 	case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
@@ -961,10 +961,10 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 		} else if (ep->is_in)
 			goto stall;
 
-		tmp = __raw_readl(ep->creg);
+		tmp = readl(ep->creg);
 		tmp &= ~SET_FX;
 		tmp |= CLR_FX | AT91_UDP_FORCESTALL;
-		__raw_writel(tmp, ep->creg);
+		writel(tmp, ep->creg);
 		goto succeed;
 	case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
 			| USB_REQ_CLEAR_FEATURE:
@@ -984,10 +984,10 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
 
 		at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
 		at91_udp_write(udc, AT91_UDP_RST_EP, 0);
-		tmp = __raw_readl(ep->creg);
+		tmp = readl(ep->creg);
 		tmp |= CLR_FX;
 		tmp &= ~(SET_FX | AT91_UDP_FORCESTALL);
-		__raw_writel(tmp, ep->creg);
+		writel(tmp, ep->creg);
 		if (!list_empty(&ep->queue))
 			handle_ep(ep);
 		goto succeed;
@@ -1008,7 +1008,7 @@ stall:
 		VDBG(udc, "req %02x.%02x protocol STALL; stat %d\n",
 				pkt.r.bRequestType, pkt.r.bRequest, status);
 		csr |= AT91_UDP_FORCESTALL;
-		__raw_writel(csr, creg);
+		writel(csr, creg);
 		udc->req_pending = 0;
 	}
 	return;
@@ -1018,7 +1018,7 @@ succeed:
 	PACKET("ep0 in/status\n");
 write_in:
 	csr |= AT91_UDP_TXPKTRDY;
-	__raw_writel(csr, creg);
+	writel(csr, creg);
 	udc->req_pending = 0;
 }
 
@@ -1026,7 +1026,7 @@ static void handle_ep0(struct at91_udc *udc)
 {
 	struct at91_ep		*ep0 = &udc->ep[0];
 	u32 __iomem		*creg = ep0->creg;
-	u32			csr = __raw_readl(creg);
+	u32			csr = readl(creg);
 	struct at91_request	*req;
 
 	if (unlikely(csr & AT91_UDP_STALLSENT)) {
@@ -1034,9 +1034,9 @@ static void handle_ep0(struct at91_udc *udc)
 		udc->req_pending = 0;
 		csr |= CLR_FX;
 		csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL);
-		__raw_writel(csr, creg);
+		writel(csr, creg);
 		VDBG(udc, "ep0 stalled\n");
-		csr = __raw_readl(creg);
+		csr = readl(creg);
 	}
 	if (csr & AT91_UDP_RXSETUP) {
 		nuke(ep0, 0);
@@ -1070,7 +1070,7 @@ static void handle_ep0(struct at91_udc *udc)
 		 */
 		} else {
 			udc->req_pending = 0;
-			__raw_writel(csr, creg);
+			writel(csr, creg);
 
 			/*
 			 * SET_ADDRESS takes effect only after the STATUS
@@ -1104,10 +1104,10 @@ static void handle_ep0(struct at91_udc *udc)
 				if (handle_ep(ep0)) {
 					/* send IN/STATUS */
 					PACKET("ep0 in/status\n");
-					csr = __raw_readl(creg);
+					csr = readl(creg);
 					csr &= ~SET_FX;
 					csr |= CLR_FX | AT91_UDP_TXPKTRDY;
-					__raw_writel(csr, creg);
+					writel(csr, creg);
 					udc->req_pending = 0;
 				}
 			} else if (udc->req_pending) {
@@ -1129,14 +1129,14 @@ static void handle_ep0(struct at91_udc *udc)
 				 * that gadget drivers not use this mode.
 				 */
 				DBG(udc, "no control-OUT deferred responses!\n");
-				__raw_writel(csr | AT91_UDP_FORCESTALL, creg);
+				writel(csr | AT91_UDP_FORCESTALL, creg);
 				udc->req_pending = 0;
 			}
 
 		/* STATUS stage for control-IN; ack.  */
 		} else {
 			PACKET("ep0 out/status ACK\n");
-			__raw_writel(csr, creg);
+			writel(csr, creg);
 
 			/* "early" status stage */
 			if (req)
diff --git a/drivers/video/atmel_lcdfb.h b/drivers/video/atmel_lcdfb.h
index b8458924ba..76c0e739e8 100644
--- a/drivers/video/atmel_lcdfb.h
+++ b/drivers/video/atmel_lcdfb.h
@@ -43,8 +43,8 @@ struct atmel_lcdfb_info {
 	void			*dma_desc;
 };
 
-#define lcdc_readl(sinfo, reg)		__raw_readl((sinfo)->mmio+(reg))
-#define lcdc_writel(sinfo, reg, val)	__raw_writel((val), (sinfo)->mmio+(reg))
+#define lcdc_readl(sinfo, reg)		readl((sinfo)->mmio+(reg))
+#define lcdc_writel(sinfo, reg, val)	writel((val), (sinfo)->mmio+(reg))
 
 #define ATMEL_LCDC_STOP_NOWAIT (1 << 0)