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authorMichael Grzeschik <m.grzeschik@pengutronix.de>2020-05-04 09:50:20 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-05-05 12:22:11 +0200
commitd51e45904814b9f061ba1e301bd080158735a233 (patch)
treee494dad405e0b03b13f0d7a16d26c8379d4cc091 /drivers
parent89a6e4fa3e4c081f2140b23cfc562b3898c09ded (diff)
downloadbarebox-d51e45904814b9f061ba1e301bd080158735a233.tar.gz
barebox-d51e45904814b9f061ba1e301bd080158735a233.tar.xz
net: cpsw: cpsw_process should only handle rx channels for its own port
The driver is currently processing the whole channel list, so it is possible that it handles a channel of the wrong interface. We limit the rx_chan handling for its desired port. The cpsw_send is removing finished tx_chan transfers on each send, so this has no directional limitation. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/cpsw.c18
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 93df5aed5c..ced77dd401 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -52,6 +52,9 @@
#define CPDMA_DESC_EOP BIT(30)
#define CPDMA_DESC_OWNER BIT(29)
#define CPDMA_DESC_EOQ BIT(28)
+#define CPDMA_FROM_TO_PORT_SHIFT 16
+#define CPDMA_RX_SOURCE_PORT(__status__) \
+ (((__status__) >> CPDMA_FROM_TO_PORT_SHIFT) & 0x7)
#define SLIVER_SIZE 0x40
@@ -758,10 +761,11 @@ done:
return 0;
}
-static int cpdma_process(struct cpsw_priv *priv, struct cpdma_chan *chan,
+static int cpdma_process(struct cpsw_slave *slave, struct cpdma_chan *chan,
void **buffer, int *len)
{
struct cpdma_desc *desc = chan->head;
+ struct cpsw_priv *priv = slave->cpsw;
u32 status;
if (!desc)
@@ -783,6 +787,14 @@ static int cpdma_process(struct cpsw_priv *priv, struct cpdma_chan *chan,
return -EBUSY;
}
+ /* cpsw_send is cleaning finished descriptors on next send
+ * so we only have to check for rx channel here
+ */
+ if (CPDMA_RX_SOURCE_PORT(status) != BIT(slave->slave_num) &&
+ chan == &priv->rx_chan) {
+ return -ENOMSG;
+ }
+
chan->head = (void *)readl(&desc->hw_next);
writel((u32)desc, chan->cp);
@@ -917,7 +929,7 @@ static int cpsw_send(struct eth_device *edev, void *packet, int length)
dev_dbg(&slave->dev, "* %s slave %d\n", __func__, slave->slave_num);
/* first reap completed packets */
- while (cpdma_process(priv, &priv->tx_chan, &buffer, &len) >= 0);
+ while (cpdma_process(slave, &priv->tx_chan, &buffer, &len) >= 0);
dev_dbg(&slave->dev, "%s: %i bytes @ 0x%p\n", __func__, length, packet);
@@ -935,7 +947,7 @@ static int cpsw_recv(struct eth_device *edev)
void *buffer;
int len;
- while (cpdma_process(priv, &priv->rx_chan, &buffer, &len) >= 0) {
+ while (cpdma_process(slave, &priv->rx_chan, &buffer, &len) >= 0) {
dma_sync_single_for_cpu((unsigned long)buffer, len,
DMA_FROM_DEVICE);
net_receive(edev, buffer, len);