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authorSascha Hauer <s.hauer@pengutronix.de>2019-03-11 09:49:25 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-03-11 10:02:36 +0100
commite0e87be220fa4f1182462e772aa77454f799d40d (patch)
tree5863ca74b18c16ebac47efdba18241f0d134478d /drivers
parentc7cc27d006ccca5951b8fecb596d546998181f7c (diff)
downloadbarebox-e0e87be220fa4f1182462e772aa77454f799d40d.tar.gz
clk: mux: Support CLK_SET_RATE_NO_REPARENT flag
Since barebox doesn't do reparenting on rate changes we only have to define the flag. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/rockchip/clk-rk3188.c2
-rw-r--r--drivers/clk/rockchip/clk-rk3288.c2
2 files changed, 0 insertions, 4 deletions
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 8ed3a6d..9340739 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -25,8 +25,6 @@
#define RK3066_GRF_SOC_STATUS 0x15c
#define RK3188_GRF_SOC_STATUS 0xac
-#define CLK_SET_RATE_NO_REPARENT 0
-
enum rk3188_plls {
apll, cpll, dpll, gpll,
};
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index e7cc9c1..dcfaae2 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -25,8 +25,6 @@
#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
#define RK3288_GRF_SOC_STATUS1 0x284
-#define CLK_SET_RATE_NO_REPARENT 0
-
enum rk3288_plls {
apll, dpll, cpll, gpll, npll,
};