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authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:31:09 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:31:09 +0200
commitd9cefd38d3bae229ef7b22184e429a9aa4be2bd8 (patch)
tree6839624923566d6d7323bba5bf1ece34ff197e3b /dts/Bindings/arc
parentc672e87588a9db0b2f23938964d882c38cb21f2c (diff)
downloadbarebox-d9cefd38d3bae229ef7b22184e429a9aa4be2bd8.tar.gz
barebox-d9cefd38d3bae229ef7b22184e429a9aa4be2bd8.tar.xz
dts: update to v4.6-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arc')
-rw-r--r--dts/Bindings/arc/archs-pct.txt2
-rw-r--r--dts/Bindings/arc/pct.txt2
2 files changed, 2 insertions, 2 deletions
diff --git a/dts/Bindings/arc/archs-pct.txt b/dts/Bindings/arc/archs-pct.txt
index 1ae98b87c6..e4b9dcee6d 100644
--- a/dts/Bindings/arc/archs-pct.txt
+++ b/dts/Bindings/arc/archs-pct.txt
@@ -2,7 +2,7 @@
The ARC HS can be configured with a pipeline performance monitor for counting
CPU and cache events like cache misses and hits. Like conventional PCT there
-are 100+ hardware conditions dynamically mapped to upto 32 counters.
+are 100+ hardware conditions dynamically mapped to up to 32 counters.
It also supports overflow interrupts.
Required properties:
diff --git a/dts/Bindings/arc/pct.txt b/dts/Bindings/arc/pct.txt
index 7b9588444f..4e874d9a38 100644
--- a/dts/Bindings/arc/pct.txt
+++ b/dts/Bindings/arc/pct.txt
@@ -2,7 +2,7 @@
The ARC700 can be configured with a pipeline performance monitor for counting
CPU and cache events like cache misses and hits. Like conventional PCT there
-are 100+ hardware conditions dynamically mapped to upto 32 counters
+are 100+ hardware conditions dynamically mapped to up to 32 counters
Note that:
* The ARC 700 PCT does not support interrupts; although HW events may be