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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-11-28 11:02:14 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-11-28 11:06:44 +0100 |
commit | 2e9cce8fb1f577088e2b20ae2f461130e13ad190 (patch) | |
tree | f82ae53e88d36e07608be1b3159da296ed025ef1 /dts/Bindings/arm/amlogic/smp-sram.txt | |
parent | c68d466d263827692aa809e6b34abb90a1cab515 (diff) | |
download | barebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.gz barebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.xz |
dts: update to v4.15-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/amlogic/smp-sram.txt')
-rw-r--r-- | dts/Bindings/arm/amlogic/smp-sram.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/dts/Bindings/arm/amlogic/smp-sram.txt b/dts/Bindings/arm/amlogic/smp-sram.txt new file mode 100644 index 0000000000..3473ddaadf --- /dev/null +++ b/dts/Bindings/arm/amlogic/smp-sram.txt @@ -0,0 +1,32 @@ +Amlogic Meson8 and Meson8b SRAM for smp bringup: +------------------------------------------------ + +Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores. +Once the core gets powered up it executes the code that is residing at a +specific location. + +Therefore a reserved section sub-node has to be added to the mmio-sram +declaration. + +Required sub-node properties: +- compatible : depending on the SoC this should be one of: + "amlogic,meson8-smp-sram" + "amlogic,meson8b-smp-sram" + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sram.txt + +Example: + + sram: sram@d9000000 { + compatible = "mmio-sram"; + reg = <0xd9000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xd9000000 0x20000>; + + smp-sram@1ff80 { + compatible = "amlogic,meson8b-smp-sram"; + reg = <0x1ff80 0x8>; + }; + }; |