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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-09 08:45:25 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-11 09:50:08 +0100 |
commit | ab001302c8e1718110bb8839c270d2caa817b214 (patch) | |
tree | f5ab4feb5242e548917c3536b8510080df9a4e8f /dts/Bindings/arm/arch_timer.txt | |
parent | c937ef5d34ede89ae382cfe6d98ba366859a65af (diff) | |
download | barebox-ab001302c8e1718110bb8839c270d2caa817b214.tar.gz barebox-ab001302c8e1718110bb8839c270d2caa817b214.tar.xz |
dts: update to v3.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/arch_timer.txt')
-rw-r--r-- | dts/Bindings/arm/arch_timer.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/dts/Bindings/arm/arch_timer.txt b/dts/Bindings/arm/arch_timer.txt index 37b2cafa4e..256b4d8bab 100644 --- a/dts/Bindings/arm/arch_timer.txt +++ b/dts/Bindings/arm/arch_timer.txt @@ -22,6 +22,14 @@ to deliver its interrupts via SPIs. - always-on : a boolean property. If present, the timer is powered through an always-on power domain, therefore it never loses context. +** Optional properties: + +- arm,cpu-registers-not-fw-configured : Firmware does not initialize + any of the generic timer CPU registers, which contain their + architecturally-defined reset values. Only supported for 32-bit + systems which follow the ARMv7 architected reset values. + + Example: timer { |