diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-04 16:10:53 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-05 13:50:03 +0200 |
commit | 618948e4e5b399295bbe56bfb30891790cae9232 (patch) | |
tree | 15b1424ce28f92fe546189d82b1f4d6258db5333 /dts/Bindings/arm/atmel-sysregs.txt | |
parent | a53e3c4e166e82e6abd8528c2dd1f91639407737 (diff) | |
download | barebox-618948e4e5b399295bbe56bfb30891790cae9232.tar.gz barebox-618948e4e5b399295bbe56bfb30891790cae9232.tar.xz |
dts: update to v5.15-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/atmel-sysregs.txt')
-rw-r--r-- | dts/Bindings/arm/atmel-sysregs.txt | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/dts/Bindings/arm/atmel-sysregs.txt b/dts/Bindings/arm/atmel-sysregs.txt index 807264a78e..16eef600d5 100644 --- a/dts/Bindings/arm/atmel-sysregs.txt +++ b/dts/Bindings/arm/atmel-sysregs.txt @@ -45,7 +45,8 @@ RAMC SDRAM/DDR Controller required properties: "atmel,at91sam9260-sdramc", "atmel,at91sam9g45-ddramc", "atmel,sama5d3-ddramc", - "microchip,sam9x60-ddramc" + "microchip,sam9x60-ddramc", + "microchip,sama7g5-uddrc" - reg: Should contain registers location and length Examples: @@ -55,6 +56,17 @@ Examples: reg = <0xffffe800 0x200>; }; +RAMC PHY Controller required properties: +- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon" +- reg: Should contain registers location and length + +Example: + + ddr3phy: ddr3phy@e3804000 { + compatible = "microchip,sama7g5-ddr3phy", "syscon"; + reg = <0xe3804000 0x1000>; +}; + SHDWC Shutdown Controller required properties: |